From: Jerome Glisse
This is a halfway fix for hawaii acceleration. More fixes to come
but hopefully isolated to userspace.
Signed-off-by: J?r?me Glisse
Cc: stable at vger.kernel.org
---
drivers/gpu/drm/radeon/cik.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/radeon/cik.
From: Jerome Glisse
This fix black screen on resume issue that some people are
experiencing. There is a bug in the atombios code regarding
pll/crtc mapping. The atombios code reverse the logic for
the pll and crtc mapping.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/atombios_crtc.c
From: Jerome Glisse
This fix black screen on resume issue that some people are
experiencing. There is a bug in the atombios code regarding
pll/crtc mapping. The atombios code reverse the logic for
the pll and crtc mapping.
v2: DCE3 or DCE2 only have 2 crtc
Signed-off-by: Jerome Glisse
---
dri
From: Jerome Glisse
There is a rare case, that seems to only happen accross suspend/resume
cycle, where a bo is associated with several different handle. This
lead to a deadlock in ttm buffer reservation path. This could only
happen with flinked(globaly exported) object. Userspace should not
reop
From: Jerome Glisse
To avoid kernel rejecting cs if we return different global name
for same bo keep track of global name and always return the same.
Seems to fix issue with suspend/resume failing and repeatly printing
following message :
[drm:radeon_cs_ioctl] *ERROR* Failed to parse relocation -
From: Jerome Glisse
It make no sense to preserve caching state especialy when
moving from vram to system. It burden the page allocator to
match the vram caching (often WC) which just burn CPU cycle
for no good reasons.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/ttm/ttm_bo.c | 15 +++-
So i spend the day looking at ttm and eviction. The first patch i sent
earlier is i believe something that should be merged. This patch however
is more about discussing if other people are interested in similar mecanism
to be share among driver through ttm. I could otherwise just move its logic
to
From: Jerome Glisse
This patch add a minimum residency time configurable for each memory
pool (VRAM, GTT, ...). Intention is to avoid having a lot of memory
eviction from VRAM up to a point where the GPU pretty much spend all
it's time moving things in and out.
Signed-off-by: Jerome Glisse
---
From: Jerome Glisse
Force the use of cached memory when evicting from vram on non agp
hardware. Also force write combine on agp hw. This is to insure
the minimum cache type change when allocating memory and improving
memory eviction especialy on pci/pcie hw.
Signed-off-by: Jerome Glisse
---
dr
From: Jerome Glisse
If GPU reset fails the gart table ptr might be NULL avoid a
kernel segfault in this rare event.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/r600.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/
So as a followup is 2 patch. The first one just stop trying to move
object at each cs ioctl i believe it could be included in 3.7 as it
improve performances (especialy with vram change from userspace).
The second one implement a vram eviction policy. It's a simple one,
buffer used for write operat
From: Jerome Glisse
The bo creation placement is where the bo will be. Instead of trying
to move bo at each command stream let this work to another worker
thread that will use more advance heuristic.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h| 1 +
drivers/gpu/dr
From: Jerome Glisse
Use delayed work thread to move buffer out of vram if they haven't
been use over some period of time. This allow to make room for
buffer that are actively use.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h| 13 ++
drivers/gpu/drm/radeon/radeon_cs
From: Jerome Glisse
In case of multiple page table for GART, driver want to know which
buffer object is being bind/unbind. This allow driver to bind/unbind
buffer object from several different GART.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/nouveau/nouveau_bo.c |3 ++-
drivers/gpu
From: Jerome Glisse
After GPU lockup VRAM gart table is unpinned and thus its pointer
becomes unvalid. This patch move the unpin code to a common helper
function and set pointer to NULL so that page update code can check
if it should update GPU page table or not. That way bo still bound
to GART c
From: Jerome Glisse
Since force handling rework of d0d0a225e6ad43314c9aa7ea081f76adc5098ad4
we could end up bouncing connector status btw disconnected and unknown.
When connector status change a call to output_poll_changed happen which
in turn ask again for detect but with force set.
So set the
From: Jerome Glisse
Cayman seems to be particularly sensitive to read cache returning
old data after bind/unbind to GTT. Flush read cache for GTT range
with each fences for all new hw. Should fix several rendering glitches.
Like
V2 flush whole address space
https://bugs.freedesktop.org/show_bug
From: Jerome Glisse
Cayman seems to be particularly sensitive to read cache returning
old data after bind/unbind to GTT. Flush read cache for GTT range
with each fences for all new hw. Should fix several rendering glitches.
Like
V2 flush whole address space
V3 also flush shader read cache
https
From: Jerome Glisse
Polarity needs to be set accordingly to connector status (connected
or disconnected). Set it up at module init so first hotplug works
reliably no matter what is the initial set of connector.
Signed-off-by: Jerome Glisse
cc: stable at kernel.org
---
drivers/gpu/drm/radeon/ra
This was discussed previously :
http://lists.freedesktop.org/archives/dri-devel/2012-January/018463.html
The plat de resistance is in patch4, the first 3 are simplification that
i believe can go as is.
Idea is that driver needs to know when ever a bo move happen and instead
of having 3 set of cal
From: Jerome Glisse
ttm_bo_move_ttm have no use to know if bo is evicted or to know
if it shouldn't wait (as the function never wait anyway)
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/nouveau/nouveau_bo.c |4 ++--
drivers/gpu/drm/radeon/radeon_ttm.c |4 ++--
drivers/gpu/drm/ttm/
From: Jerome Glisse
ttm_bo_move_accel_cleanup have no use to know if it can wait on
reserve or wait on gpu as there is no such wait in this helper.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/nouveau/nouveau_bo.c |3 +--
drivers/gpu/drm/radeon/radeon_ttm.c |3 +--
drivers/gpu/drm
From: Jerome Glisse
ttm_bo_move_memcpy have no use to know if it can wait on
reserve or wait on gpu as there is no such wait in this helper.
Doesn't care either to know if it's an eviction, memcpy
is not a GPU pipelineable case.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/nouveau/nouveau_
From: Jerome Glisse
Move buffer object move logic inside driver callback so we don't
have complex move_notify and cache_invalidate callback in error
path. This simplify driver at the expense of some code duplication
among drivers.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/nouveau/nouvea
From: Jerome Glisse
If AGP is placed in the middle, the size_af is off-by-one, it results
in VRAM being placed at 0x7fff instead of 0x800.
v2: fix the vram_start setup.
v3: also fix r7xx & newer ASIC
Reported-by: russiane39 on #radeon
Signed-off-by: Dave Airlie
Signed-off-by: Jerome G
Patches also available at:
http://people.freedesktop.org/~glisse/debug/
So it's the Christian series minus all the debugfs related to
ring/ib/mc. The last patch add a new blob dumping facilities
that dump everythings (pm4, relocs table, bo content). It's
just a proof of concept to show what i mean
From: Jerome Glisse
Those file never were really helpfull in debuging.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/r100.c | 186 -
drivers/gpu/drm/radeon/r300.c | 50 -
drivers/gpu/drm/radeon/r420.c | 45
From: Christian K?nig
Different rings have different criteria to test
if they are stuck.
v2: rebased on current drm-next
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon.h |4 +-
drivers/gpu/drm/radeon/radeon_asic.c | 44
From: Christian K?nig
It makes no sense at all to have more than one flag.
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/radeon/r100.c |1 -
drivers/gpu/drm/radeon/r300.c |1 -
drivers/gpu/drm/radeon/radeon.h|1 -
drivers/gp
From: Christian K?nig
Removing all the different error messages and
having just one standard behaviour over all
chipset generations.
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/radeon/evergreen.c |7 ++-
drivers/gpu/drm/radeon/ni.c |7 ++
From: Christian K?nig
Previusly multiple rings could trigger multiple GPU
resets at the same time.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon.h |3 +-
drivers/gpu/drm/radeon/radeon_fence.c | 150 +
2 files changed, 77 insertions(
From: Christian K?nig
Aligning offset can make it bigger than tmp->offset
leading to an overrun bug in the following subtraction.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon_sa.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/rade
From: Christian K?nig
Make the suballocator self containing to locking.
v2: split the bugfix into a seperate patch.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon.h|1 +
drivers/gpu/drm/radeon/radeon_sa.c | 17 +++--
2 files changed, 12 insertions(+), 6
From: Christian K?nig
With that in place clients are automatically blocking
until their memory request can be handled.
v2: block only if the memory request can't be satisfied
in the first try, the first version actually lacked
a night of sleep.
v3: make blocking optional, update comment
From: Christian K?nig
Directly use the suballocator to get small chunks
of memory. It's equally fast and doesn't crash when
we encounter a GPU reset.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/evergreen.c|1 -
drivers/gpu/drm/radeon/ni.c |1 -
drive
From: Christian K?nig
We should signal the caller that we haven't waited at all.
v2: only change fence_wait_next not fence_wait_last.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon_fence.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/
From: Christian K?nig
As discussed with Michel that name better
describes the behavior of this function.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon.h|2 +-
drivers/gpu/drm/radeon/radeon_device.c |2 +-
drivers/gpu/drm/radeon/radeon_fence.c |4 ++--
3
From: Christian K?nig
It isn't necessary any more and the suballocator
seems to perform even better.
v2: drop debugfs
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon.h | 22 +---
drivers/gpu/drm/radeon/radeon_device.c|1 -
drivers/gpu/drm/radeon/radeon_fen
From: Christian K?nig
Rings need to lock in order, otherwise
the ring subsystem can deadlock.
v2: fix error handling and number of locked doublewords.
v3: stop creating unneeded semaphores.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon.h |4 ++
drivers/gpu/drm
From: Christian K?nig
Instead of all this humpy pumpy with recursive
mutex (which also fixes only halve of the problem)
move the actual gpu reset out of the fence code,
return -EDEADLK and then reset the gpu in the
calling ioctl function.
v2: Split removal of radeon_mutex into separate patch.
From: Christian K?nig
Not needed anymore.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon.h| 44 +---
drivers/gpu/drm/radeon/radeon_cs.c | 10 +++---
drivers/gpu/drm/radeon/radeon_device.c |2 +-
drivers/gpu/drm/radeon/radeon_gar
From: Jerome Glisse
It isn't chipset specific, so it makes no sense
to have that inside r100.c.
v2: rebase on debugfs removal
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/evergreen.c |5 +--
drivers/gpu/drm/radeon/ni.c |5 +--
drivers/gpu/drm/radeon/r100.c
From: Christian K?nig
Don't hard code the 10 seconds timeout. Compute jobs
can run much longer.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon.h |1 +
drivers/gpu/drm/radeon/radeon_drv.c |4
drivers/gpu/drm/radeon/radeon_ring.c |2 +-
3 files changed, 6
From: Christian K?nig
Fixing just another deadlock problem with gpu reset tests.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon_ring.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c
b/drivers/gpu/drm/radeon/rade
From: Christian K?nig
Nothing chipset or ring specific with it,
so also move it to radon_ring.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/evergreen.c | 10 +-
drivers/gpu/drm/radeon/ni.c | 11 +--
drivers/gpu/drm/radeon/r100.c| 10 +--
From: Christian K?nig
Since it is now identical to r100_gpu_is_lockup.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/r300.c| 14 --
drivers/gpu/drm/radeon/radeon_asic.c | 16
drivers/gpu/drm/radeon/radeon_asic.h |1 -
3 files changed, 8
From: Christian K?nig
Since it is now identical to evergreen_gpu_is_lockup.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/ni.c | 19 ---
drivers/gpu/drm/radeon/radeon_asic.c | 12 ++--
drivers/gpu/drm/radeon/radeon_asic.h |1 -
3 files chang
From: Christian K?nig
That should aid in debugging multi ring lockups.
v2 rebase on top of debugfs removal
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon.h |1 +
drivers/gpu/drm/radeon/radeon_fence.c |1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff
From: Christian K?nig
Free them wenn the ib is freed, another
step to better debugging.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon.h |3 +++
drivers/gpu/drm/radeon/radeon_cs.c | 14 --
drivers/gpu/drm/radeon/radeon_ring.c |3 +++
3 files chang
From: Jerome Glisse
This add a command buffer dumping facilities, that will
dump command buffer and all associated bo that most likely
triggered a lockup.
Idea is that we go through unsignaled fence and we dump the
ib of the oldest unsignaled fence. Dumping is a 2 step process
on lockup detectio
From: Jerome Glisse
Lock/unlock mutex in proper order to avoid deadlock in case
of GPU reset triggered from VM code path.
Cc: stable at vger.kernel.org [3.5]
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_gart.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-
From: Jerome Glisse
Virtual address need to be fenced to know when we can safely remove it.
This patch also properly clear the pagetable. Previously it was
serouisly broken.
v2: For to update pagetable when unbinding bo (don't bailout if
bo_va->valid is true).
Signed-off-by: Jerome Glisse
From: Jerome Glisse
Virtual address need to be fenced to know when we can safely remove it.
This patch also properly clear the pagetable. Previously it was
serouisly broken.
v2: For to update pagetable when unbinding bo (don't bailout if
bo_va->valid is true).
This version is for stable 3.5
From: Jerome Glisse
Virtual address need to be fenced to know when we can safely remove it.
This patch also properly clear the pagetable. Previously it was
serouisly broken.
Kernel 3.5/3.4 need a similar patch but adapted for difference in mutex locking.
v2: For to update pagetable when unbindi
From: Jerome Glisse
Virtual address need to be fenced to know when we can safely remove it.
This patch also properly clear the pagetable. Previously it was
serouisly broken.
v2: For to update pagetable when unbinding bo (don't bailout if
bo_va->valid is true).
v3: Fix compilation warnings
T
From: Jerome Glisse
Virtual address need to be fenced to know when we can safely remove it.
This patch also properly clear the pagetable. Previously it was
serouisly broken.
Kernel 3.5/3.4 need a similar patch but adapted for difference in mutex locking.
v2: For to update pagetable when unbindi
From: Jerome Glisse
Virtual address need to be fenced to know when we can safely remove it.
This patch also properly clear the pagetable. Previously it was
serouisly broken.
v2: For to update pagetable when unbinding bo (don't bailout if
bo_va->valid is true).
v3: Fix compilation warnings
v4
From: Jerome Glisse
Use the ttm bo delayed destruction queue so that we don't block
userspace when destroying bo. The virtual address destruction
will happen at same time as the real bo destruction when everythings
using the bo is done.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/r
From: Jerome Glisse
Limit printing bad edid information at one time per connector.
Connector that are connected to a bad monitor/kvm will likely
stay connected to the same bad monitor/kvm and it makes no
sense to keep printing the bad edid message.
Signed-off-by: Jerome Glisse
---
drivers/gpu/
From: Jerome Glisse
If spread spectrum is enabled and in use for a given pll we
should not turn it off as it will lead to turning off display
for crtc that use the pll (this behavior was observed on chelsea
edp).
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/atombios_crtc.c | 25 ++
From: Jerome Glisse
It seems some of those IGP dislike non dma32 page.
https://bugzilla.redhat.com/show_bug.cgi?id=785375
Signed-off-by: Jerome Glisse
Cc:
---
drivers/gpu/drm/radeon/radeon_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/rad
From: Jerome Glisse
It seems some of those IGP dislike non dma32 page despite what
documentation says. Fix regression since we allowed non dma32
pages. It seems it only affect some revision of those IGP chips
as we don't know which one just force dma32 for all of them.
https://bugzilla.redhat.co
From: Jerome Glisse
Set the proper number of tile pipe that should be a multiple of
pipe depending on the number of se engine.
Fix:
https://bugs.freedesktop.org/show_bug.cgi?id=56405
https://bugs.freedesktop.org/show_bug.cgi?id=56720
v2: Don't change sumo2
Signed-off-by: Jerome Glisse
Cc: sta
From: Jerome Glisse
The dma ring can't write to register thus have to write to memory
its fence value. This ensure that it doesn't try to use scratch
register for dma ring fence driver.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/r600.c | 3 ++-
drivers/gpu/drm/radeon/radeo
From: Jerome Glisse
Fix the size computation of the htile buffer.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen_cs.c | 17 +--
drivers/gpu/drm/radeon/r600_cs.c | 92 ---
drivers/gpu/drm/radeon/radeon_drv.c | 3 +-
3 files changed,
From: Jerome Glisse
After lockup we need to resume fence to last sync sequence and not
last received sequence so that all thread waiting on command stream
that lockedup resume. Otherwise GPU reset will be ineffective in most
cases.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon
From: Jerome Glisse
Modeset path seems to conflict sometimes with the memory management
leading to kernel deadlock. This move modesetting reset after GPU
acceleration reset.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_device.c | 3 ++-
1 file changed, 2 insertions(+), 1 dele
From: Jerome Glisse
Force all fence to signal if GPU reset failed so no process get stuck
on waiting fence.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h| 1 +
drivers/gpu/drm/radeon/radeon_device.c | 1 +
drivers/gpu/drm/radeon/radeon_fence.c | 19 +++
From: Jerome Glisse
radeon_fence_wait_empty_locked should not trigger GPU reset as no
place where it's call from would benefit from such thing and it
actually lead to a kernel deadlock in case the reset is triggered
from pm codepath. Instead force ring completion in place where it
makes sense or
From: Jerome Glisse
To make it easier to debug some lockup from userspace add support
to MEM_WRITE packet.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen_cs.c | 29 +
drivers/gpu/drm/radeon/r600_cs.c | 29 +
driver
From: Jerome Glisse
evergreen and northern island gpu needs more informations for 2D tiling
than previous r6xx/r7xx. Add field to tiling ioctl to allow userspace
to provide those.
The v8 cs checking change to track color view on r6xx/r7xx doesn't
affect old userspace as old userspace always emit
From: Jerome Glisse
For 6xx+. Required for mesa to use htile support for HiZ/HiS.
Userspace will check radeon version 2.14 with is bumped either
by tiling patch or stream out patch.
Signed-off-by: Pierre-Eric Pelloux-Prayer
Signed-off-by: Alex Deucher
Signed-off-by: Jerome Glisse
---
driver
From: Jerome Glisse
If accel is not working many subsystem such as the ib pool might not be
initialized properly that can lead to segfault inside kernel when cs
ioctl is call with non working acceleration. To avoid this make sure
the accel working flag is false when an error in GPU startup happen
From: Jerome Glisse
For 6xx+. Required for mesa to use htile support for HiZ/HiS.
Userspace will check radeon version 2.14 with is bumped either
by tiling patch or stream out patch. This patch only add support
for htile relocation which should be enough for any userspace
to implement the hyperz
From: Jerome Glisse
ttm might call the move notify with null new mem placement,
properly handle this case inside nouveau move notify callback.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/nouveau/nouveau_bo.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/dri
From: Jerome Glisse
Silence out the lock dependency warning by moving bo allocation out
of ib mutex protected section. Might lead to useless temporary
allocation but it's not harmful as such things only happen at
initialization.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_ri
From: Jerome Glisse
GPU reset need to be exclusive, one happening at a time. For this
add a rw semaphore so that any path that trigger GPU activities
have to take the semaphore as a reader thus allowing concurency.
The GPU reset path take the semaphore as a writer ensuring that
no concurrent res
From: Jerome Glisse
In gem idle/busy ioctl the radeon object was derefenced after
drm_gem_object_unreference_unlocked which in case the object
have been destroyed lead to use of a possibly free pointer with
possibly wrong data.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_gem
From: Jerome Glisse
GPU reset need to be exclusive, one happening at a time. For this
add a rw semaphore so that any path that trigger GPU activities
have to take the semaphore as a reader thus allowing concurency.
The GPU reset path take the semaphore as a writer ensuring that
no concurrent res
From: Ben Skeggs
This was true for new TTM_PL_SYSTEM and new TTM_PL_TT cases, but wasn't
the case on TTM_PL_SYSTEM<->TTM_PL_TT moves, which causes trouble on some
paths as nouveau's move_notify() hook requires that the dma addresses be
valid at this point.
Signed-off-by: Ben Skeggs
Reviewed-by:
From: Jerome Glisse
For some reason SPI block is in broken state after module
unloading. This lead to broken rendering after reloading
module. Fix this by reseting SPI block in CP resume function
Signed-off-by: Jerome Glisse
Two following patch are on top of
http://cgit.freedesktop.org/~glisse/linux
They make the ib allocation size a function of the cs size, this
allow to avoid wasting pool space and avoid to trigger fence_wait
in ib_get. I am still evaluating how much fence_wait we avoid
with this.
Cheers,
Jerome
From: Jerome Glisse
This avoid to waste ib pool size and avoid a bunch of wait for
previous ib to finish.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/r100.c |2 +-
drivers/gpu/drm/radeon/r600.c |2 +-
drivers/gpu/drm/radeon/r600_blit_kms.c | 16 +
From: Jerome Glisse
This allow to share the ib pool with semaphore and avoid
having more bo around.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h | 67 -
drivers/gpu/drm/radeon/radeon_device.c|2 +-
drivers/gpu/drm/radeon/radeon_ring.c |
Hi,
So attached is last batch of patch, i split the ttm put page
fix and i fixed a bug in the pages alloc when clear flags
wasn't set. I tested them on a bunch of radeon and everythings
seems fine (several gl app, firefox, compositor ...). I will
do more testing on agp and nouveau tomorrow.
The l
From: Jerome Glisse
This was never use in none of the driver, properly using userspace
page for bo would need more code (vma interaction mostly). Removing
this dead code in preparation of ttm_tt & backend merge.
Signed-off-by: Jerome Glisse
Reviewed-by: Konrad Rzeszutek Wilk
---
drivers/gpu/d
From: Jerome Glisse
Split btw highmem and lowmem page was rendered useless by the
pool code. Remove it. Note further cleanup would change the
ttm page allocation helper to actualy take an array instead
of relying on list this could drasticly reduce the number of
function call in the common case o
From: Jerome Glisse
This field is not use by any of the driver just drop it.
Signed-off-by: Jerome Glisse
Reviewed-by: Konrad Rzeszutek Wilk
---
drivers/gpu/drm/radeon/radeon_ttm.c |1 -
include/drm/ttm/ttm_bo_driver.h |2 --
2 files changed, 0 insertions(+), 3 deletions(-)
diff
From: Jerome Glisse
On failure we need to make sure the page we free has wb cache
attribute. Do this pas call the proper ttm page helper function.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/ttm/ttm_tt.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/drivers/
From: Jerome Glisse
Use the ttm_tt page ptr array for page allocation, move the list to
array unwinding into the page allocation functions.
V2 split the fix to use ttm put page as a separate fix
properly fill pages array when TTM_PAGE_FLAG_ZERO_ALLOC is not
set
Signed-off-by: Jerome Glisse
---
From: Jerome Glisse
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/ttm/ttm_tt.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c
index 2dd45ca..58ea7dc 100644
--- a/drivers/gpu/drm/ttm/ttm_tt.c
+++ b/drivers/
From: Jerome Glisse
ttm_backend will exist only and only with a ttm_tt, and ttm_tt
will be of interesting use only when bind to a backend. Thus to
avoid code & data duplication btw the two merge them.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/nouveau/nouveau_bo.c| 14 ++-
drivers/
From: Jerome Glisse
Move the page allocation and freeing to driver callback and
provide ttm code helper function for those.
Most intrusive change, is the fact that we now only fully
populate an object this simplify some of code designed around
the page fault design.
Signed-off-by: Jerome Glisse
From: Jerome Glisse
After GPU lockup VRAM gart table is unpinned and thus its pointer
becomes unvalid. This patch move the unpin code to a common helper
function and set pointer to NULL so that page update code can check
if it should update GPU page table or not. That way bo still bound
to GART c
Hi,
So updated patchset, only patch 5 seen change since last set.
Last 3 patch are from your patchset, modified on top of mine.
Konrad so i added you dma pool allocator on top of that
and added support for it to radeon. All in all it's slightly
smaller than your patchset.
Biggest change is use o
From: Jerome Glisse
This was never use in none of the driver, properly using userspace
page for bo would need more code (vma interaction mostly). Removing
this dead code in preparation of ttm_tt & backend merge.
Signed-off-by: Jerome Glisse
Reviewed-by: Konrad Rzeszutek Wilk
---
drivers/gpu/d
From: Jerome Glisse
Split btw highmem and lowmem page was rendered useless by the
pool code. Remove it. Note further cleanup would change the
ttm page allocation helper to actualy take an array instead
of relying on list this could drasticly reduce the number of
function call in the common case o
From: Jerome Glisse
This field is not use by any of the driver just drop it.
Signed-off-by: Jerome Glisse
Reviewed-by: Konrad Rzeszutek Wilk
---
drivers/gpu/drm/radeon/radeon_ttm.c |1 -
include/drm/ttm/ttm_bo_driver.h |2 --
2 files changed, 0 insertions(+), 3 deletions(-)
diff
From: Jerome Glisse
On failure we need to make sure the page we free has wb cache
attribute. Do this pas call the proper ttm page helper function.
Signed-off-by: Jerome Glisse
Reviewed-by: Konrad Rzeszutek Wilk
---
drivers/gpu/drm/ttm/ttm_tt.c |5 -
1 files changed, 4 insertions(+), 1
From: Jerome Glisse
Use the ttm_tt page ptr array for page allocation, move the list to
array unwinding into the page allocation functions.
V2 split the fix to use ttm put page as a separate fix
properly fill pages array when TTM_PAGE_FLAG_ZERO_ALLOC is not
set
V3 Added back page_count()==1 chec
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