Hi all,
For the STM8 platform, SDCC adds "clr a", "div x, a" instructions as a
prologue to the start of all interrupt service routines (ISRs) in order
to mitigate the published errata "Unexpected DIV/DIVW instruction result
in ISR". However, as far as I know, this workaround is unnecessary when
the code within the ISR does not perform any division instructions.
I am writing some code where I am trying to reduce interrupt latency as
much as possible, to respond to an event as quickly as possible. But my
ISR code does not use DIV anywhere (in fact, my entire program does
not), so this workaround is consuming cycles unnecessarily.
Is there any way to tell SDCC to leave the workaround out?
I could mark the ISR function as __naked, but then I would have to add
my own __asm__("iret"), which would also prevent some peephole
optimisation, which I don't want to happen, so I'd prefer if there was
some other way.
Regards,
Basil Hussain
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