Okay, I am confused now...
I can probably solve the particular instance of this non-optimisation by removing the "push a" and "pop a" pro/epilogue from my inline assembly, as the following C code does not rely on A being maintained. But I am hesitant to do so, concerned that I may inadvertently introduce a bug in the future by changing the surrounding C code to something that does - who knows what the compiler may do?
I removed the "push/pop a" wrapping my inline assembly. Now, the first use of the A register - whether in my inline assembly, or after it - is definitely, absolutely 100% a write to A (and therefore I believe should make notUsed() return true), and yet SDCC still refuses to apply the peephole rule 19-0 and optimise to a bres instruction.
What is going on here? A bug? Here is the complete ASM listing of my function, if it helps: _flash_write_block_pgm: ld a, (0x07, sp) bcp a, #0x7f jrne 00101$ ld a, (0x0a, sp) cp a, #0x80 jreq 00102$ 00101$: clr a jra 00108$ 00102$: bset 20571, #0 ld a, 0x505c ; and a, #0xfe ; Should be optimised to "bres 20572, #0" ld 0x505c, a ; ldw x, (0x06, sp) ldw y, (0x04, sp) ldw _flash_write_block_addr_tmp+2, x ldw _flash_write_block_addr_tmp+0, y ldw x, (0x08, sp) ldw _flash_write_block_buf_tmp+0, x clrw x 0001$: cpw x, #128 jrnc 0002$ ld a, ([_flash_write_block_buf_tmp], x) ; First use of A, inline ASM ldf ([_flash_write_block_addr_tmp+1], x), a incw x jra 0001$ 0002$: clrw x decw x 00105$: ld a, 0x505f ; First use of A, if ignoring inline ASM bcp a, #0x04 jrne 00107$ decw x tnzw x jrne 00105$ 00107$: negw x clr a rlc a 00108$: retf Regards, Basil _______________________________________________ Sdcc-user mailing list Sdcc-user@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sdcc-user
