Thanks, perfect And the work-around I used was this (snippets):
# define HIGH(I) ((I) >> 8) & 0xFF # define LOW(I) (I) & 0x00FF ... void set_ccp1_rc2(unsigned int match_cnt) { T1CONbits.TMR1ON = 0; // Stop timer. TMR1 = 0; //Clear timer. CCPR1H = HIGH(match_cnt); CCPR1L = LOW(match_cnt); CCP1CON = 0b00001001; // From here pin will be set. Cleared on match. T1CONbits.TMR1ON = 1; // Roll the timer. } So not so much changes required. Also, the macros defined here aligns with sdcc manual recommendation on the subject in section 8.1.12. It now runs as expected on the device. My first reflex was to make a type like this: /* Make a type consuming an integer space (16 bits) with low and high byte * easily accessible */ typedef union { unsigned int val; struct { unsigned int low: 8; unsigned int high: 8; } byte; } Intlohi; But then I realized (by proper warnings during compile time and the manual) that sdcc does not support passing structs as arguments, so then I figure it wasn't worth it. However, that also works if you design your functions with low and high arguments as unsigned char and then passing in match_cnt.byte.high and match_cnt.byte.low for example. / Tomas On Tue, Feb 17, 2015 at 11:55:39AM +0100, Gál Zsolt wrote: > Hello, > > The CCPR1 is defined in a header file as an 8 bit special function register > and > not 16 bit special function register. So the compiler does its job perfectly > in > this situation. > > //============================================================================= > = > > extern __at(0x0FBE) __sfr CCPR1; > extern __at(0x0FBE) __sfr CCPR1L; > extern __at(0x0FBF) __sfr CCPR1H; > > The question is, why isn't defined CCPR1 as __sfr16. > I don't know why. Probably the endianness not the same in the hardware as the > SDCC requires. I think, the developers will answer this question. > > So you should divide the value moving into two steps temporally while there > will be better solution. > > Zsolt > > 2015-02-16 22:20 GMT+01:00 Tomas Nordin <tom...@kth.se>: > > I am writing code for the PIC 18f2550 target. Forgot to mension. > > On Mon, Feb 16, 2015 at 10:16:20PM +0100, Nordin Tomas wrote: > > Hi > > > > I have a function that look like this: > > > > void set_ccp1_rc2(unsigned int match_cnt) > > { > > T1CONbits.TMR1ON = 0; // Stop timer. > > TMR1 = 0; //Clear timer. > > CCPR1 = match_cnt; > > CCP1CON = 0b00001001; // From here pin will be set. Cleared on > match. > > T1CONbits.TMR1ON = 1; // Roll the timer. > > } > > > > It translates after compile to this: > > > > S_timing__set_ccp1_rc2 code > > _set_ccp1_rc2: > > ; .line 87; SRC/timing.c void set_ccp1_rc2(unsigned int > match_cnt) > > MOVFF FSR2L, POSTDEC1 > > MOVFF FSR1L, FSR2L > > MOVFF r0x00, POSTDEC1 > > MOVFF r0x01, POSTDEC1 > > MOVLW 0x02 > > MOVFF PLUSW2, r0x00 > > MOVLW 0x03 > > MOVFF PLUSW2, r0x01 > > ; .line 89; SRC/timing.c T1CONbits.TMR1ON = 0; // Stop > timer. > > BCF _T1CONbits, 0 > > ; .line 90; SRC/timing.c TMR1 = 0; //Clear timer. > > CLRF _TMR1 > > ; .line 91; SRC/timing.c CCPR1 = match_cnt; > > MOVF r0x00, W > > MOVWF _CCPR1 > > ; .line 92; SRC/timing.c CCP1CON = 0b00001001; // From here > pin will be set. Cleared on match. > > MOVLW 0x09 > > MOVWF _CCP1CON > > ; .line 93; SRC/timing.c T1CONbits.TMR1ON = 1; // Roll the > timer. > > BSF _T1CONbits, 0 > > MOVFF PREINC1, r0x01 > > MOVFF PREINC1, r0x00 > > MOVFF PREINC1, FSR2L > > RETURN > > > > There is a problem with the running code on the device. It occurs to me > > that only one byte is written to the _CCPR1 register (MOVWF _CCPR1). > > Also I am confused to see direct writes to 16-bit equates in the > > assembly code, is that possible? > > > > Should the above translation work as intended or is there something > > funky? > > > > / > > > > Tomas > > > ------------------------------------------------------------------------------ > Download BIRT iHub F-Type - The Free Enterprise-Grade BIRT Server > from Actuate! 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