On Sun, 25 Jan 2015 12:40:32 +0200 Kustaa Nyholm <kustaa.nyh...@planmeca.com> wrote:
> In removing extended instructions from the Diolan bootloader > > I had to change a lot of instructions like: > > < subfsr FSR2, 3 ;;; 0xFFFD = -3 (The original content of the W register is damaged. Must be saved before the operation, and then be restored.) movlw 0xFD addwf FSR2L, F movlw 0xFF addwfc FSR2H, F ;;; or (The original content of the W register is damaged. Must be saved before the operation, and then be restored.) movlw 3 subwf FSR2L, F movlw 0 subwfb FSR2H, F > --- > > ;subfsr FSR2, 3 > > movf POSTDEC2, W > > movf POSTDEC2, W > > movf POSTDEC2, W > > < addfsr FSR2, 4 ;;; (The original content of the W register is damaged. Must be saved before the operation, and then be restored.) movlw 4 addwf FSR2L, F movlw 0 addwfc FSR2H, F ;;; or (Unfortunately, this is a little long, but the original content of the W register will remain intact.) infsnz FSR2L, F incf FSR2H, F infsnz FSR2L, F incf FSR2H, F infsnz FSR2L, F incf FSR2H, F infsnz FSR2L, F incf FSR2H, F > --- > > ;addfsr FSR2, 4 > > movf POSTINC2, W > > movf POSTINC2, W > > movf POSTINC2, W > > movf POSTINC2, W > > > And now the code won't fit ... any better replacements > for those 'addfsr' and 'subfsr' instructions? > > > br Kusti Károly ------------------------------------------------------------------------------ New Year. New Location. New Benefits. New Data Center in Ashburn, VA. GigeNET is offering a free month of service with a new server in Ashburn. Choose from 2 high performing configs, both with 100TB of bandwidth. Higher redundancy.Lower latency.Increased capacity.Completely compliant. http://p.sf.net/sfu/gigenet _______________________________________________ Sdcc-user mailing list Sdcc-user@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sdcc-user
