On Thu, Feb 04, 2010 at 12:24:02AM +0100, Jan Waclawek wrote: > This won't answer your questions, but the W7100 datasheet (version 0.9.2 - > current) on page 31 says: > > When MOVX instruction uses R0 or R1 register, the most significant part of > the address A[23:16] is always equal to the content of MXAX(0xEA) while > another A[15:8] is always equal to P2(0xA0) contents. > > Jan Waclawek > > ----- Original Message ----- > >The chip has dual DPTRs but no > > P2 nor XPAGE. >
Thanks, I hadn't noticed that! Actually, that part works as well, in that the internal tcp offload engine appears to be working fine (which is what is in the top end of the 24 bit address space), its the LCD (whose data bus is on the P2 port at 0xA0) that seems to have trouble and the leds on port 0 (at 0x80) that have issues during initialization that make me think thats where my problem lies. Peter Van Epp ------------------------------------------------------------------------------ The Planet: dedicated and managed hosting, cloud storage, colocation Stay online with enterprise data centers and the best network in the business Choose flexible plans and management services without long-term contracts Personal 24x7 support from experience hosting pros just a phone call away. http://p.sf.net/sfu/theplanet-com _______________________________________________ Sdcc-user mailing list Sdcc-user@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sdcc-user