Dear R users,

my search for a possibility to convert a generated model into VHDL to program 
an FPGA has still no solution.

The problem:
caret -> training -> model -> model.rds -> model.xml (PMML) --?--> VHDL-Code 
--?--> FPGA

The (simplified) task:
A photo detector with 16 channels is measuring the intensity of 16 different 
wavelength ranges. These data are classified with the possible results “sunny”, 
“cloudy” and “rainy”. The model is trained, tested and finalized with „caret“ 
and saved as an .rds-file.

The solution with R:
Import new data and classify them with that model.

The problem without R:
How can the model be converted to other languages? (e.g. PMML, but this only 
supports a couple of models)
How is PMML (*.xml) converted to VHDL to program a FPGA or a MC which can 
execute the classification?
Do I first have to compile it to Python/Matlab/…? And how?

My question:
Does anybody have experiences with this and/or a solution without uploading the 
model somewhere to translate it?

Thank you all in advance.
 
Marian

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