How do we implement Hardware Semaphore (HSEM) in QEMU for this type? Any suggestions.
BR. Abhijeet. On Wed, 15 Dec, 2021, 23:20 Philippe Mathieu-Daudé, <f4...@amsat.org> wrote: > On 12/15/21 23:10, abhijeet inamdar wrote: > > Thanks, I'll check it out. > > > > Can we do full system mode or qemu-sytem-arm ? > > You should be able to do full system emulation (qemu-system-arm) > with 2 Cortex-A7 cores and 1 Cortex-M3 core. > > > > > BR. > > Abhijeet > > > > On Wed, 15 Dec, 2021, 22:38 Philippe Mathieu-Daudé, <f4...@amsat.org > > <mailto:f4...@amsat.org>> wrote: > > > > On 12/15/21 22:24, abhijeet inamdar wrote: > > > Hi, > > > > > > I was going through the aspeed ast2600(not evb) it has Dual-core > > Arm A7 > > > and embedded M3. How can extend it/implementation in the existing > one. > > > 1) Is it possible ? > > > > Yes. > > > > > 2) How can I do it? > > > > Look at the Xilinx ZynqMP ZCU102 board (4xA53s and 2xR5Fs): > > hw/arm/xlnx-zcu102.c > > >
