Hi,
Nice to get your replies. I am doing some research which requires me to
have some system level memory traces for all memory instructions. I want to
use that trace to do some TLB or cache studies.

Actually I don't care if I have the full PCID instruction implementation, I
just need to know the PCID of each memory access, in order to do tagged TLB
studies.

So I still have 2 questions:
1. Can I do this work in KVM mode, i.e. can plugin work in KVM mode?
2. Do I need to change anything to get the right PCID? I have seen the PCID
field get set in cr3 but I am not sure it's the right one.

On Thu, Feb 18, 2021 at 7:00 AM Paolo Bonzini <pbonz...@redhat.com> wrote:

> On 18/02/21 12:43, Alex Bennée wrote:
> >
> > Kaifeng Xu <kaife...@princeton.edu> writes:
> >
> >> Hi,
> >> I am running QEMU in TCG mode (my server doesn't have kvm support), and
> I
> >> am getting the memory traces in a x86 guest machine of all memory
> accesses,
> >> including the PCID (process-context identifier, and I need that for my
> >> current research), on a linux host. I have seen the TCG PCID feature
> flag
> >> is commented out in target/i386/cpu.c, and if I directly emulate a CPU
> >> which has PCID flag I got the warning:
> >>
> >> warning: TCG doesn't support requested feature: CPUID.01H:ECX.pcid [bit
> 17]
> >>
> >> so I uncommented the CPUID_EXT_PCID in TCG_EXT_FEATURES, and
> >> the CPUID_7_0_EBX_INVPCID in TCG_7_0_EBX_FEATURES, in
> target/i386/cpu.c. I
> >> have seen the PCID in the cr3 register in cpu get set, my question is
> that
> >> I am not sure if there will be any issues with this flag. Why is it
> >> commented out by default?
> >
> > Typically the TCG implementation of x86 is fairly behind the features
> > that may be reported or need to be handled for KVM. For example TCG
> > doesn't support the most recent AVX instructions.
> >
> > I can't speak to how much effort it would be to implement PCID for x86
> > TCG, that is probably a question best aimed at the maintainers for the
> > architecture (cc'd).
>
> Little, overall.  You don't have to _actually_ support PCID-tagging in
> the TLB, you only need to support the instruction; in general, using TCG
> as a benchmarking platform for something that depends on MMU events such
> as TLB misses is not a good idea).
>
> In this case, everything seemingly works because QEMU is not checking
> reserved bits in CR3 and CR4 (see cpu_x86_update_cr3 and
> cpu_x86_update_cr4 in target/i386/helper.c).
>
> A smaller issue is that PCID without the INVPCID instruction makes
> little sense, so you would have to implement that as well.
>
> Paolo
>
> >> Just in case, I will put my commands here. Here are my configurations
> for
> >> compiling:
> >>
> >> *./configure --prefix=/tigress/kaifengx/sysroot/
> >> --target-list=x86_64-softmmu,x86_64-linux-user --disable-kvm
> --disable-vnc
> >> --enable-gtk --enable-plugins*
> >>
> >> And my command for running the QEMU:
> >>
> >>
> >> *qemu-system-x86_64 \*
> >> *    -cpu qemu64,+pcid\    -m 4G \    -icount shift=0 \    -drive
> >> if=virtio,file=${DISK},cache=none \    -device pqii \    -trace
> >> events=`pwd`/events \    -D ${LOG_FILE} \    -net
> >> user,hostfwd=tcp::10022-:22 \    -net nic \    -display none \
> >> -nographic \    -plugin
> QEMU_PATH/tests/plugin/libtlb.so,arg=inline,arg=io*
> >
> > Ahh good to see another plugin user. Be aware I just recently posted
> > a pull request that fixes some recent breakages in the inline handling.
> >
> > What are you trying to measure with the plugin?
> >
>
>

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