Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
target/sparc/insns.decode | 1 +
target/sparc/translate.c | 54 +++++----------------------------------
2 files changed, 8 insertions(+), 47 deletions(-)
diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode
index 1f6dfa210f..7ec1518b54 100644
--- a/target/sparc/insns.decode
+++ b/target/sparc/insns.decode
@@ -192,6 +192,7 @@ TSUBcc 10 ..... 100001 ..... . .............
@r_r_ri
TADDccTV 10 ..... 100010 ..... . ............. @r_r_ri
TSUBccTV 10 ..... 100011 ..... . ............. @r_r_ri
MULScc 10 ..... 100100 ..... . ............. @r_r_ri
+POPC 10 rd:5 101110 00000 imm:1 rs2_or_imm:s13 &r_r_ri rs1=0
&shiftr rd rs1 rs2 x:bool
@shiftr .. rd:5 ...... rs1:5 . x:1 ....... rs2:5 &shiftr
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 81a2518498..caa2eff626 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -665,6 +665,11 @@ static void gen_op_tsubcctv(TCGv dst, TCGv src1, TCGv src2)
gen_helper_tsubcctv(dst, tcg_env, src1, src2);
}
+static void gen_op_popc(TCGv dst, TCGv src1, TCGv src2)
+{
+ tcg_gen_ctpop_tl(dst, src2);
+}
+
// 1
static void gen_op_eval_ba(TCGv dst)
{
@@ -2629,19 +2634,6 @@ static TCGv get_src1(DisasContext *dc, unsigned int insn)
return gen_load_gpr(dc, rs1);
}
-static TCGv get_src2(DisasContext *dc, unsigned int insn)
-{
- if (IS_IMM) { /* immediate */
- target_long simm = GET_FIELDs(insn, 19, 31);
- TCGv t = tcg_temp_new();
- tcg_gen_movi_tl(t, simm);
- return t;
- } else { /* register */
- unsigned int rs2 = GET_FIELD(insn, 27, 31);
- return gen_load_gpr(dc, rs2);
- }
-}
-
#ifdef TARGET_SPARC64
static void gen_fmovs(DisasContext *dc, DisasCompare *cmp, int rd, int rs)
{
@@ -4188,6 +4180,7 @@ TRANS(UDIVX, 64, do_arith, a, gen_op_udivx, NULL)
TRANS(SDIVX, 64, do_arith, a, gen_op_sdivx, NULL)
TRANS(UDIV, ALL, do_arith, a, gen_op_udiv, NULL)
TRANS(SDIV, ALL, do_arith, a, gen_op_sdiv, NULL)
+TRANS(POPC, 64, do_arith, a, gen_op_popc, NULL)
TRANS(ADDcc, ALL, do_cc_arith, a, CC_OP_ADD, gen_op_add_cc, NULL)
TRANS(ANDcc, ALL, do_cc_arith, a, CC_OP_LOGIC, tcg_gen_and_tl, tcg_gen_andi_tl)
@@ -4744,40 +4737,7 @@ static void disas_sparc_legacy(DisasContext *dc,
unsigned int insn)
goto illegal_insn;
}
} else if (xop < 0x36) {
- if (xop < 0x20) {
- goto illegal_insn;
- } else {
- cpu_src1 = get_src1(dc, insn);
- cpu_src2 = get_src2(dc, insn);
- switch (xop) {
- case 0x20: /* taddcc */
- case 0x21: /* tsubcc */
- case 0x22: /* taddcctv */
- case 0x23: /* tsubcctv */
- case 0x24: /* mulscc */
- case 0x25: /* sll */
- case 0x26: /* srl */
- case 0x27: /* sra */
- goto illegal_insn; /* in decodetree */
- case 0x30:
- goto illegal_insn; /* WRASR in decodetree */
- case 0x32:
- goto illegal_insn; /* WRPR in decodetree */
- case 0x33: /* wrtbr, UA2005 wrhpr */
- goto illegal_insn; /* WRTBR, WRHPR in decodetree */
-#ifdef TARGET_SPARC64
- case 0x2c: /* V9 movcc */
- case 0x2f: /* V9 movr */
- goto illegal_insn; /* in decodetree */
- case 0x2e: /* V9 popc */
- tcg_gen_ctpop_tl(cpu_dst, cpu_src2);
- gen_store_gpr(dc, rd, cpu_dst);
- break;
-#endif
- default:
- goto illegal_insn;
- }
- }
+ goto illegal_insn; /* in decodetree */
} else if (xop == 0x36) { /* UltraSparc shutdown, VIS, V8 CPop1 */
#ifdef TARGET_SPARC64
int opf = GET_FIELD_SP(insn, 5, 13);
--
2.34.1
