[RFC PATCH v2 62/78] hw/gpio: add fallthrough pseudo-keyword

[Emmanouil Pitsidianakis]

In preparation of raising -Wimplicit-fallthrough to 5, replace all
fall-through comments with the fallthrough attribute pseudo-keyword.

Signed-off-by: Emmanouil Pitsidianakis <manos.pitsidiana...@linaro.org>
---
 hw/gpio/omap_gpio.c  | 2 +-
 hw/i2c/bitbang_i2c.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/gpio/omap_gpio.c b/hw/gpio/omap_gpio.c
index a3341d70f1..82a9ea4810 100644
--- a/hw/gpio/omap_gpio.c
+++ b/hw/gpio/omap_gpio.c
@@ -532,54 +532,54 @@ static uint64_t omap2_gpio_module_readp(void *opaque, 
hwaddr addr,
 static void omap2_gpio_module_writep(void *opaque, hwaddr addr,
                                      uint64_t value, unsigned size)
 {
     uint32_t cur = 0;
     uint32_t mask = 0xffff;
 
     if (size == 4) {
         omap2_gpio_module_write(opaque, addr, value);
         return;
     }
 
     switch (addr & ~3) {
     case 0x00: /* GPIO_REVISION */
     case 0x14: /* GPIO_SYSSTATUS */
     case 0x38: /* GPIO_DATAIN */
         OMAP_RO_REG(addr);
         break;
 
     case 0x10: /* GPIO_SYSCONFIG */
     case 0x1c: /* GPIO_IRQENABLE1 */
     case 0x20: /* GPIO_WAKEUPENABLE */
     case 0x2c: /* GPIO_IRQENABLE2 */
     case 0x30: /* GPIO_CTRL */
     case 0x34: /* GPIO_OE */
     case 0x3c: /* GPIO_DATAOUT */
     case 0x40: /* GPIO_LEVELDETECT0 */
     case 0x44: /* GPIO_LEVELDETECT1 */
     case 0x48: /* GPIO_RISINGDETECT */
     case 0x4c: /* GPIO_FALLINGDETECT */
     case 0x50: /* GPIO_DEBOUNCENABLE */
     case 0x54: /* GPIO_DEBOUNCINGTIME */
         cur = omap2_gpio_module_read(opaque, addr & ~3) &
                 ~(mask << ((addr & 3) << 3));
 
-        /* Fall through.  */
+        fallthrough;
     case 0x18: /* GPIO_IRQSTATUS1 */
     case 0x28: /* GPIO_IRQSTATUS2 */
     case 0x60: /* GPIO_CLEARIRQENABLE1 */
     case 0x64: /* GPIO_SETIRQENABLE1 */
     case 0x70: /* GPIO_CLEARIRQENABLE2 */
     case 0x74: /* GPIO_SETIREQNEABLE2 */
     case 0x80: /* GPIO_CLEARWKUENA */
     case 0x84: /* GPIO_SETWKUENA */
     case 0x90: /* GPIO_CLEARDATAOUT */
     case 0x94: /* GPIO_SETDATAOUT */
         value <<= (addr & 3) << 3;
         omap2_gpio_module_write(opaque, addr, cur | value);
         break;
 
     default:
         OMAP_BAD_REG(addr);
         return;
     }
 }
diff --git a/hw/i2c/bitbang_i2c.c b/hw/i2c/bitbang_i2c.c
index de5f5aacf5..3d768ae564 100644
--- a/hw/i2c/bitbang_i2c.c
+++ b/hw/i2c/bitbang_i2c.c
@@ -79,99 +79,99 @@ static int bitbang_i2c_nop(bitbang_i2c_interface *i2c)
 /* Returns data line level.  */
 int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level)
 {
     int data;
 
     if (level != 0 && level != 1) {
         abort();
     }
 
     if (line == BITBANG_I2C_SDA) {
         if (level == i2c->last_data) {
             return bitbang_i2c_nop(i2c);
         }
         i2c->last_data = level;
         if (i2c->last_clock == 0) {
             return bitbang_i2c_nop(i2c);
         }
         if (level == 0) {
             /* START condition.  */
             bitbang_i2c_set_state(i2c, SENDING_BIT7);
             i2c->current_addr = -1;
         } else {
             /* STOP condition.  */
             bitbang_i2c_enter_stop(i2c);
         }
         return bitbang_i2c_ret(i2c, 1);
     }
 
     data = i2c->last_data;
     if (i2c->last_clock == level) {
         return bitbang_i2c_nop(i2c);
     }
     i2c->last_clock = level;
     if (level == 0) {
         /* State is set/read at the start of the clock pulse.
            release the data line at the end.  */
         return bitbang_i2c_ret(i2c, 1);
     }
     switch (i2c->state) {
     case STOPPED:
     case SENT_NACK:
         return bitbang_i2c_ret(i2c, 1);
 
     case SENDING_BIT7 ... SENDING_BIT0:
         i2c->buffer = (i2c->buffer << 1) | data;
         /* will end up in WAITING_FOR_ACK */
         bitbang_i2c_set_state(i2c, i2c->state + 1);
         return bitbang_i2c_ret(i2c, 1);
 
     case WAITING_FOR_ACK:
     {
         int ret;
 
         if (i2c->current_addr < 0) {
             i2c->current_addr = i2c->buffer;
             trace_bitbang_i2c_addr(i2c->current_addr);
             ret = i2c_start_transfer(i2c->bus, i2c->current_addr >> 1,
                                      i2c->current_addr & 1);
         } else {
             trace_bitbang_i2c_send(i2c->buffer);
             ret = i2c_send(i2c->bus, i2c->buffer);
         }
         if (ret) {
             /* NACK (either addressing a nonexistent device, or the
              * device we were sending to decided to NACK us).
              */
             bitbang_i2c_set_state(i2c, SENT_NACK);
             bitbang_i2c_enter_stop(i2c);
             return bitbang_i2c_ret(i2c, 1);
         }
         if (i2c->current_addr & 1) {
             bitbang_i2c_set_state(i2c, RECEIVING_BIT7);
         } else {
             bitbang_i2c_set_state(i2c, SENDING_BIT7);
         }
         return bitbang_i2c_ret(i2c, 0);
     }
     case RECEIVING_BIT7:
         i2c->buffer = i2c_recv(i2c->bus);
         trace_bitbang_i2c_recv(i2c->buffer);
-        /* Fall through... */
+        fallthrough;
     case RECEIVING_BIT6 ... RECEIVING_BIT0:
         data = i2c->buffer >> 7;
         /* will end up in SENDING_ACK */
         bitbang_i2c_set_state(i2c, i2c->state + 1);
         i2c->buffer <<= 1;
         return bitbang_i2c_ret(i2c, data);
 
     case SENDING_ACK:
         if (data != 0) {
             bitbang_i2c_set_state(i2c, SENT_NACK);
             i2c_nack(i2c->bus);
         } else {
             bitbang_i2c_set_state(i2c, RECEIVING_BIT7);
         }
         return bitbang_i2c_ret(i2c, 1);
     }
     abort();
 }
-- 
2.39.2