From: Nathan Egge <ne...@xiph.org> Set V bit for hwcap if misa is set.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1793 Signed-off-by: Nathan Egge <ne...@xiph.org> Reviewed-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com> Tested-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com> Message-Id: <20230803131424.40744-1-ne...@xiph.org> Signed-off-by: Richard Henderson <richard.hender...@linaro.org> (cherry picked from commit 4333f0924c2f2ca8efaebaed8c24f55f77d8b013) Signed-off-by: Michael Tokarev <m...@tls.msk.ru> diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 20894b633f..c2c095d383 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -1664,7 +1664,8 @@ static uint32_t get_elf_hwcap(void) #define MISA_BIT(EXT) (1 << (EXT - 'A')) RISCVCPU *cpu = RISCV_CPU(thread_cpu); uint32_t mask = MISA_BIT('I') | MISA_BIT('M') | MISA_BIT('A') - | MISA_BIT('F') | MISA_BIT('D') | MISA_BIT('C'); + | MISA_BIT('F') | MISA_BIT('D') | MISA_BIT('C') + | MISA_BIT('V'); return cpu->env.misa_ext & mask; #undef MISA_BIT -- 2.39.2
