On 24 February 2012 10:20, Magnus Therning <mag...@therning.org> wrote: > On Thu, Feb 23, 2012 at 23:26, Peter Maydell <peter.mayd...@linaro.org> wrote: >> Yes. Our infrastructure for doing it in a neatly encapsulated >> way has been a bit lacking but is getting better. Already in >> the tree there is emulation of OMAP1 and OMAP2 and (just landed) >> the Samsung Exynos4210. > > Excellent, I'll have to take a look at those then. It sounds like I/O > of "general-purpose micro controllers", like A/D converters and PWM, > would have to be written, is that correct?
Depends entirely on what SoC you're modelling and what it has on it. A SoC is just a collection of devices which happen to be on one piece of silicon. If you're lucky we have models of those device; if you're unlucky we don't and you need to write them. (Probably you'll be unlucky; there's a lot of variation and most SoC vendors seem to use their own flavours of everything.) >>> I've looked around a bit, and found some indications of it, e.g. a >>> branch that allows connection between SystemC and qemu. >> >> SystemC support is a completely unrelated question to whether >> we emulate SoCs. (We don't have any SystemC support in mainline, >> as it happens.) > > Well, true, except maybe that SystemC could be a way to write the > co-processors/peripherals on the SoC. That would be rather taking the long way around compared to just writing the peripherals as native qemu device models. NB that at the moment qemu doesn't support having more than one actual CPU; usually where a SoC has some kind of DSP or coprocessor we just don't bother modelling it. -- PMM
