For initial CXL emulation / kernel driver bring up a single Host-managed Device Memory (HDM) decoder instance was sufficient as it let us test the basic region creation code etc. More complex testing appropriate today requires a more realistic configuration with multiple decoders.
The Linux kernel will use separate decoders for each memory type (and shortly per DCD region) and for each interleave set within a memory type or DCD region. 4 decoders are sufficient for most test cases today but we may need to grow these further in future. This patch set already allowed us to identify one kernel bug which is now fixed. https://lore.kernel.org/linux-cxl/168696507968.3590522.14484000711718573626.st...@dwillia2-xfh.jf.intel.com/ Note that, whilst I'm proposing this series for upstream (based on priorities of what we have out of tree) it hasn't previously been posted so needs review. (I failed to send it out previously) Based on: [PATCH 0/4] hw/cxl: Minor CXL emulation fixes and cleanup Based on: [PATCH v2 0/3] hw/cxl: Add dummy ACPI QTG DSM Based on: Message ID: 20230904132806.6094-1-jonathan.came...@huawei.com Based on: Message ID: 20230904161847.18468-1-jonathan.came...@huawei.com Jonathan Cameron (2): hw/cxl: Add utility functions decoder interleave ways and target count. hw/cxl: Support 4 HDM decoders at all levels of topology include/hw/cxl/cxl_component.h | 21 ++++++++ hw/cxl/cxl-component-utils.c | 43 +++++++++++---- hw/cxl/cxl-host.c | 65 +++++++++++++++-------- hw/mem/cxl_type3.c | 97 +++++++++++++++++++++++----------- 4 files changed, 164 insertions(+), 62 deletions(-) -- 2.39.2
