This only adds a limited set of s390x instructions for initial testing. More instructions will be added later.
Signed-off-by: Thomas Huth <th...@redhat.com> --- s390x.risu | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 s390x.risu diff --git a/s390x.risu b/s390x.risu new file mode 100644 index 0000000..3ad7015 --- /dev/null +++ b/s390x.risu @@ -0,0 +1,48 @@ +############################################################################### +# Copyright 2023 Red Hat Inc. +# All rights reserved. This program and the accompanying materials +# are made available under the terms of the Eclipse Public License v1.0 +# which accompanies this distribution, and is available at +# http://www.eclipse.org/legal/epl-v10.html +# +# Contributors: +# Thomas Huth - initial implementation +############################################################################### + +.mode s390x + +# format:RR Add (register + register, 32 bit) +AR Z 00011010 r1:4 r2:4 + +# format:RRE Add (register + register, 64 bit) +AGR Z 10111001 00001000 00000000 r1:4 r2:4 + +# format:RRE Add (register + register, 32 bit to 64 bit) +AGFR Z 10111001 00011000 00000000 r1:4 r2:4 + +# format:RRF-a Add (three registers, 32 bit) +ARK STFLE45 10111001 11111000 r3:4 0000 r1:4 r2:4 + +# format:RRF-a Add (three registers, 64 bit) +AGRK STFLE45 10111001 11101000 r3:4 0000 r1:4 r2:4 + + +# format:RRE Add Halfword Immediate (32 bit) +AHI Z 10100111 r1:4 1010 i2:16 + +# format:RI Add Halfword Immediate (64 bit) +AGHI Z 10100111 r1:4 1011 i2:16 + + +# format:RR Add Logical (32 bit) +ALR Z 00011110 r1:4 r2:4 + +# format:RRE Add Logical (64 bit) +ALGR Z 10111001 00001010 00000000 r1:4 r2:4 + +# format:RRE Add Logical (32 bit to 64 bit) +ALGFR Z 10111001 00011010 00000000 r1:4 r2:4 + + +# format:RRF-c Population Count +POPCNT STFLE45 10111001 11100001 m3:4 0000 r1:4 r2:4 -- 2.39.3
