+PMM (I think this one might have fallen throught the cracks)
Best regards, Francisco Iglesias On [2023 Jun 18] Sun 00:50:47, Philippe Mathieu-Daudé wrote: > On 16/6/23 16:38, Kinsey Moore wrote: > > The Cadence GEM peripherals as configured for Zynq MPSoC and Versal > > platforms have two priority queues with separate interrupt sources for > > each. If the interrupt source for the second priority queue is not > > connected, they work in polling mode only. This change connects the > > second interrupt source for platforms where it is available. This patch > > has been tested using the lwIP stack with a Xilinx-supplied driver from > > their embeddedsw repository. > > > > Signed-off-by: Kinsey Moore <kinsey.mo...@oarcorp.com> > > --- > > hw/arm/xlnx-versal.c | 12 +++++++++++- > > hw/arm/xlnx-zynqmp.c | 11 ++++++++++- > > include/hw/arm/xlnx-versal.h | 1 + > > include/hw/arm/xlnx-zynqmp.h | 1 + > > 4 files changed, 23 insertions(+), 2 deletions(-) > > Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org> > >
