On 22/5/23 08:00, Philippe Mathieu-Daudé wrote:
Hi Jiaxun,
On 21/5/23 23:48, Jiaxun Yang wrote:
Loongson introduced CSR instructions since 3A4000, which looks
similar to IOCSR and CPUCFG instructions we seen in LoongArch.
Unfortunately we don't have much document about those instructions,
bit fields of CPUCFG instructions and IOCSR registers can be found
at 3A4000's user manual, while instruction encodings can be found
at arch/mips/include/asm/mach-loongson64/loongson_regs.h from
Linux Kernel.
Our predefined CPUCFG bits are differ from actual 3A4000, since
we can't emulate all CPUCFG features present in 3A4000 for now,
we just enable bits for what we have in TCG.
Signed-off-by: Jiaxun Yang <jiaxun.y...@flygoat.com>
---
target/mips/cpu-defs.c.inc | 9 ++++
target/mips/cpu.c | 8 ++++
target/mips/cpu.h | 40 ++++++++++++++++
target/mips/helper.h | 4 ++
target/mips/internal.h | 2 +
target/mips/tcg/lcsr.decode | 17 +++++++
target/mips/tcg/lcsr_translate.c | 69 ++++++++++++++++++++++++++++
target/mips/tcg/meson.build | 2 +
target/mips/tcg/op_helper.c | 16 +++++++
target/mips/tcg/sysemu/lcsr_helper.c | 45 ++++++++++++++++++
target/mips/tcg/sysemu/meson.build | 4 ++
target/mips/tcg/sysemu_helper.h.inc | 8 ++++
target/mips/tcg/translate.c | 3 ++
target/mips/tcg/translate.h | 7 +++
14 files changed, 234 insertions(+)
create mode 100644 target/mips/tcg/lcsr.decode
create mode 100644 target/mips/tcg/lcsr_translate.c
create mode 100644 target/mips/tcg/sysemu/lcsr_helper.c
@@ -1281,6 +1315,12 @@ static inline bool
ase_msa_available(CPUMIPSState *env)
return env->CP0_Config3 & (1 << CP0C3_MSAP);
}
+/* Check presence of Loongson CSR instructions */
+static inline bool ase_lcsr_available(CPUMIPSState *env)
+{
+ return env->lcsr_cpucfg1 & (1 << CPUCFG2_LCSRP);
You are checking CPUCFG1_ITLBT. Surely you want lcsr_cpucfg2 instead.
Ping?
Anyhow:
Applying: target/mips: Implement Loongson CSR instructions
error: patch failed: target/mips/cpu.c:507
error: target/mips/cpu.c: patch does not apply
error: patch failed: target/mips/cpu.h:1162
error: target/mips/cpu.h: patch does not apply
Patch failed at 0001 target/mips: Implement Loongson CSR instructions
