Il mer 28 giu 2023, 13:28 Bernhard Beschow <shen...@gmail.com> ha scritto:
> > > Am 27. Juni 2023 12:07:40 UTC schrieb Olaf Hering <o...@aepfle.de>: > >Tue, 27 Jun 2023 10:12:50 +0000 Bernhard Beschow <shen...@gmail.com>: > > > >> The BAR is a 32 bit register whose default value is 0x00000001. I think > what's supposed to happen here is a pci_set_long() rather than a > pci_set_byte(). > > > >Indeed, the u32 at that address changes from c121 to c101 with the > current code. > > Neat! Would you mind sending a patch fixing the BMIBA register to be reset > as 32 bit? > I think we should also check why writing the command register is not disabling the BAR as well. Paolo > Best regards, > Bernhard > > > >Olaf > >