On Fri, Jun 9, 2023 at 11:29 AM Tommy Wu <tommy...@sifive.com> wrote:
>
> According to the `The RISC-V Advanced Interrupt Architecture`
> document, if register `mmsiaddrcfgh` of the domain has bit L set
> to one, then `smsiaddrcfg` and `smsiaddrcfgh` are locked as
> read-only alongside `mmsiaddrcfg` and `mmsiaddrcfgh`.
>
> Signed-off-by: Tommy Wu <tommy...@sifive.com>
> Reviewed-by: Frank Chang <frank.ch...@sifive.com>
Looks good to me.
Reviewed-by: Anup Patel <a...@brainfault.org>
> ---
> hw/intc/riscv_aplic.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
> index afc5b54dbb..4bdc6a5d1a 100644
> --- a/hw/intc/riscv_aplic.c
> +++ b/hw/intc/riscv_aplic.c
> @@ -688,13 +688,13 @@ static void riscv_aplic_write(void *opaque, hwaddr
> addr, uint64_t value,
> * domains).
> */
> if (aplic->num_children &&
> - !(aplic->smsicfgaddrH & APLIC_xMSICFGADDRH_L)) {
> + !(aplic->mmsicfgaddrH & APLIC_xMSICFGADDRH_L)) {
> aplic->smsicfgaddr = value;
> }
> } else if (aplic->mmode && aplic->msimode &&
> (addr == APLIC_SMSICFGADDRH)) {
> if (aplic->num_children &&
> - !(aplic->smsicfgaddrH & APLIC_xMSICFGADDRH_L)) {
> + !(aplic->mmsicfgaddrH & APLIC_xMSICFGADDRH_L)) {
> aplic->smsicfgaddrH = value & APLIC_xMSICFGADDRH_VALID_MASK;
> }
> } else if ((APLIC_SETIP_BASE <= addr) &&
> --
> 2.31.1
>
