"Wu, Fei" <fei2...@intel.com> writes:
> On 5/30/2023 6:08 PM, Alex Bennée wrote: >> >> "Wu, Fei" <fei2...@intel.com> writes: >> >>> On 5/30/2023 1:01 PM, Wu, Fei wrote: >>>> On 5/30/2023 12:07 PM, Richard Henderson wrote: >>>>> On 5/29/23 04:49, Fei Wu wrote: <snip> > ---------------- > IN: > Priv: 1; Virt: 0 > > 0xffffffff800abe14: 864a mv a2,s2 > 0xffffffff800abe16: 85ce mv a1,s3 > 0xffffffff800abe18: 8526 mv a0,s1 > 0xffffffff800abe1a: 46bd addi a3,zero,15 > 0xffffffff800abe1c: fffff097 auipc ra,-4096 > # 0xffffffff800aae1c > 0xffffffff800abe20: cc0080e7 jalr ra,ra,-832 > ------------------------------ > > Look at the tb with phys:0x2abe14, although the first time IR takes > 75274ns, but in the second command we can see it takes much less time > (Note IR time is accumulated). > > So if the time for the same TB is not consistent, and the deviation > could be dominated by system events such as memory allocation instead of > codegen itself (?), I think it's less useful. > > Alex, regarding dropping time profile, do you mean remove TB_JIT_TIME > completely? I think so - perf would do a better job of separating system events from the core code as it has better visibility of the whole system. -- Alex Bennée Virtualisation Tech Lead @ Linaro
