Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org> --- hw/timer/arm_timer.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c index 5caf42649a..3dda3a73f8 100644 --- a/hw/timer/arm_timer.c +++ b/hw/timer/arm_timer.c @@ -52,7 +52,7 @@ static void arm_timer_update(arm_timer_state *s) static uint32_t arm_timer_read(void *opaque, hwaddr offset) { - arm_timer_state *s = (arm_timer_state *)opaque; + arm_timer_state *s = opaque; switch (offset >> 2) { case 0: /* TimerLoad */ @@ -99,7 +99,7 @@ static void arm_timer_recalibrate(arm_timer_state *s, int reload) static void arm_timer_write(void *opaque, hwaddr offset, uint32_t value) { - arm_timer_state *s = (arm_timer_state *)opaque; + arm_timer_state *s = opaque; int freq; switch (offset >> 2) { @@ -154,7 +154,7 @@ static void arm_timer_write(void *opaque, hwaddr offset, static void arm_timer_tick(void *opaque) { - arm_timer_state *s = (arm_timer_state *)opaque; + arm_timer_state *s = opaque; s->int_level = 1; arm_timer_update(s); } @@ -214,7 +214,7 @@ static const uint8_t sp804_ids[] = { /* Merge the IRQs from the two component devices. */ static void sp804_set_irq(void *opaque, int irq, int level) { - SP804State *s = (SP804State *)opaque; + SP804State *s = opaque; s->level[irq] = level; qemu_set_irq(s->irq, s->level[0] || s->level[1]); @@ -223,7 +223,7 @@ static void sp804_set_irq(void *opaque, int irq, int level) static uint64_t sp804_read(void *opaque, hwaddr offset, unsigned size) { - SP804State *s = (SP804State *)opaque; + SP804State *s = opaque; if (offset < 0x20) { return arm_timer_read(s->timer[0], offset); @@ -255,7 +255,7 @@ static uint64_t sp804_read(void *opaque, hwaddr offset, static void sp804_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { - SP804State *s = (SP804State *)opaque; + SP804State *s = opaque; if (offset < 0x20) { arm_timer_write(s->timer[0], offset, value); @@ -349,7 +349,7 @@ struct icp_pit_state { static uint64_t icp_pit_read(void *opaque, hwaddr offset, unsigned size) { - icp_pit_state *s = (icp_pit_state *)opaque; + icp_pit_state *s = opaque; int n; /* ??? Don't know the PrimeCell ID for this device. */ @@ -365,7 +365,7 @@ static uint64_t icp_pit_read(void *opaque, hwaddr offset, static void icp_pit_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { - icp_pit_state *s = (icp_pit_state *)opaque; + icp_pit_state *s = opaque; int n; n = offset >> 8; -- 2.38.1