On Wed, 31 May 2023 at 15:58, Graeme Gregory <gra...@xora.org.uk> wrote: > > On Wed, May 31, 2023 at 03:02:29PM +0800, wangyuquan1...@phytium.com.cn wrote: > > From: Yuquan Wang <wangyuquan1...@phytium.com.cn> > > > > The current sbsa-ref cannot use EHCI controller which is only > > able to do 32-bit DMA, since sbsa-ref doesn't have RAM above 4GB. > > Hence, this uses XHCI to provide a usb controller with 64-bit > > DMA capablity instead of EHCI. > > > > Should this be below 4G?
It would be pretty disruptive to try to rearrange the memory map to put RAM below 4GB at this point, though in theory it's possible I guess. (I have a vague recollection that there was some reason the RAM was all put above 4GB, but can't find anything about that in my email archives. Perhaps Leif remembers?) > Also has EHCI never worked, or has it worked in some modes and so this > change should be versioned? AIUI, EHCI has never worked and can never have worked, because this board's RAM is all above 4G and the QEMU EHCI controller implementation only allows DMA descriptors with 32-bit addresses. Looking back at the archives, it seems we discussed XHCI vs EHCI when the sbsa-ref board went in, and the conclusion was that XHCI would be better. But there wasn't a sysbus XHCI device at that point, so we ended up committing the sbsa-ref board with EHCI and a plan to switch to XHCI when the sysbus-xhci device was done, which we then forgot about: https://mail.gnu.org/archive/html/qemu-arm/2018-11/msg00638.html thanks -- PMM