Shiva, I just queued patch 1 adding this line in the commit msg:
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1536 This was mentioned by Cedric in patch 2. Also, speaking of patch 2, take a look on Cedric's review and see if it's applicable or not. I plan to send a ppc pull request at the end of the week. Thanks, Daniel On 4/13/23 16:00, Shivaprasad G Bhat wrote:
While debugging gitlab issue[1] 1536, I happen to try the vextract[X]m instructions on the real hardware. The test used in [1] is failing for vextractdm. On debugging it is seen, in function do_extractm() the mask is calculated as dup_const(1 << (element_width - 1)). '1' being signed int works fine for MO_8,16,32. For MO_64, on PPC64 host this ends up becoming 0 on compilation. The vextractdm uses MO_64, and it ends up having mask as 0. The first patch here fixes that by explicitly using 1ULL instead of signed int 1 like its used everywhere else. Second patch introduces the test case from [1] into qemu tcg/ppc64 along with fixes/tweaks to make it work for both big and little-endian targets. Let me know if both patches should be squashed into single patch. Checkpatch flagged me to avoid use of __BYTE_ORDER__ in the test file(second patch), however I see it being used in multiarch/sha1.c also this being arch specific test, I think it is appropriate to use it here. Let me know if otherwise. References: [1] : https://gitlab.com/qemu-project/qemu/-/issues/1536 --- Shivaprasad G Bhat (2): tcg: ppc64: Fix mask generation for vextractdm tests: tcg: ppc64: Add tests for Vector Extract Mask Instructions target/ppc/translate/vmx-impl.c.inc | 2 +- tests/tcg/ppc64/Makefile.target | 6 +++- tests/tcg/ppc64/vector.c | 50 +++++++++++++++++++++++++++++ 3 files changed, 56 insertions(+), 2 deletions(-) create mode 100644 tests/tcg/ppc64/vector.c -- Signature
