According to PCIe Address Translation Services specification 5.1.3.,
ATS Control Register has Enable bit to enable/disable ATS.
A trigger function is called at the Enable bit change, so that PCIe
devices can handle ATS enable/disable.
Signed-off-by: Viktor Prutyanov <vik...@daynix.com>
---
hw/pci/pcie.c | 22 ++++++++++++++++++++++
include/hw/pci/pcie.h | 5 +++++
2 files changed, 27 insertions(+)
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index b8c24cf45f..14ac1b0fb9 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -1063,6 +1063,28 @@ void pcie_ats_init(PCIDevice *dev, uint16_t offset, bool
aligned)
pci_set_word(dev->wmask + dev->exp.ats_cap + PCI_ATS_CTRL, 0x800f);
}
+void pcie_ats_config_write(PCIDevice *dev, uint32_t address,
+ uint32_t val, int len,
+ void (*trigger_func)(PCIDevice *dev, bool enable))
+{
+ uint32_t off;
+ uint16_t ats_cap = dev->exp.ats_cap;
+
+ if (!ats_cap || address < ats_cap) {
+ return;
+ }
+ off = address - ats_cap;
+ if (off >= PCI_EXT_CAP_ATS_SIZEOF) {
+ return;
+ }
+
+ if (range_covers_byte(off, len, PCI_ATS_CTRL + 1)) {
+ if (trigger_func) {
+ trigger_func(dev, !!(val & PCI_ATS_CTRL_ENABLE));
+ }
+ }
+}
+
/* ACS (Access Control Services) */
void pcie_acs_init(PCIDevice *dev, uint16_t offset)
{
diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h
index 3cc2b15957..f5571527d3 100644
--- a/include/hw/pci/pcie.h
+++ b/include/hw/pci/pcie.h
@@ -146,4 +146,9 @@ void pcie_cap_slot_unplug_cb(HotplugHandler *hotplug_dev,
DeviceState *dev,
Error **errp);
void pcie_cap_slot_unplug_request_cb(HotplugHandler *hotplug_dev,
DeviceState *dev, Error **errp);
+
+void pcie_ats_config_write(PCIDevice *dev, uint32_t address,
+ uint32_t val, int len,
+ void (*trigger_func)(PCIDevice *dev, bool enable));
+
#endif /* QEMU_PCIE_H */
--
2.35.1
