The pmu encodes the event to counter mappings and is only used
by the SBI firmware. Currently, pmu is a subnode of soc but has
no reg properties included, causing the following failure when
checked with dt-validate.
/tmp/virt.dtb: soc: pmu: {'riscv,event-to-mhpmcounters': [[1, 1, 524281], [2,
2, 524284], [65561, 65561, 524280], [65563, 65563, 524280], [65569, 65569,
524280]], 'compatible': ['riscv,pmu']} should not be valid under {'type':
'object'}
From schema:
/home/peterlin/.local/lib/python3.10/site-packages/dtschema/schemas/simple-bus.yaml
This patch moves the pmu to top level to make the dt-validate happy.
Signed-off-by: Yu Chien Peter Lin <peter...@andestech.com>
---
hw/riscv/virt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 4e3efbee16..be8f0cb26e 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -731,7 +731,7 @@ static void create_fdt_pmu(RISCVVirtState *s)
MachineState *ms = MACHINE(s);
RISCVCPU hart = s->soc[0].harts[0];
- pmu_name = g_strdup_printf("/soc/pmu");
+ pmu_name = g_strdup_printf("/pmu");
qemu_fdt_add_subnode(ms->fdt, pmu_name);
qemu_fdt_setprop_string(ms->fdt, pmu_name, "compatible", "riscv,pmu");
riscv_pmu_generate_fdt_node(ms->fdt, hart.cfg.pmu_num, pmu_name);
--
2.34.1
