You can reproduce the problem by running gdb against an ARMv8M target running secure mode code (the default).
Running qemu with the following arguments : qemu-system-arm -machine mps2-an505 -m 16M -cpu cortex-m33 -nographic -semihosting -monitor null --semihosting-config enable=on,target=native -d guest_errors -kernel /path/to/binary.elf With the following .gdbinit file: target extended-remote :1234 compare-sections Upon startup, every symbol in the elf file reports the following error: Section .text, range 0x10000000 -- 0x10009298: MIS-MATCHED! Section .text.main, range 0x10009298 -- 0x10009300: MIS-MATCHED! Section .text.prvQueueSendTask, range 0x10009300 -- 0x10009338: MIS-MATCHED! Attempting to debug results in errors constantly (unable to read or write memory at all). init_data_sections () at /project/Demo/ARM_MPS/startup.c:95 95 { (gdb) info locals pCopyTable = <error reading variable pCopyTable (Cannot access memory at address 0x381fffec)> dataIndex = <error reading variable dataIndex (Cannot access memory at address 0x381fffe8)> Does that clarify my report sufficiently? On 4/7/23, 9:18 PM, "Richard Henderson" <richard.hender...@linaro.org <mailto:richard.hender...@linaro.org>> wrote: On 4/7/23 17:01, pbart...@amazon.com <mailto:pbart...@amazon.com> wrote: > From: Paul Bartell <pbart...@amazon.com <mailto:pbart...@amazon.com>> > > Revert changes to arm_cpu_get_phys_page_attrs_debug made in commit > 4a35855682cebb89f9630b07aa9fd37c4e8c733b. > > Commit 4a35855682 modifies the arm_cpu_get_phys_page_attrs_debug function > so that it calls get_phys_addr_with_struct rather than get_phys_addr, which > leads to a variety of memory access errors when debugging secure state > code on qemu ARMv8M targets with gdb. > > This commit fixes a variety of gdb memory access errors including: > "error reading variable" and "Cannot access memory at address" when > attempting to read any memory address via gdb. > > Signed-off-by: Paul Bartell <pbart...@amazon.com <mailto:pbart...@amazon.com>> > --- > target/arm/ptw.c | 8 ++------ > 1 file changed, 2 insertions(+), 6 deletions(-) > > diff --git a/target/arm/ptw.c b/target/arm/ptw.c > index ec3f51782a..5a1339d38f 100644 > --- a/target/arm/ptw.c > +++ b/target/arm/ptw.c > @@ -2999,16 +2999,12 @@ hwaddr arm_cpu_get_phys_page_attrs_debug(CPUState > *cs, vaddr addr, > { > ARMCPU *cpu = ARM_CPU(cs); > CPUARMState *env = &cpu->env; > - S1Translate ptw = { > - .in_mmu_idx = arm_mmu_idx(env), > - .in_secure = arm_is_secure(env), > - .in_debug = true, Nack. This will now affect vcpu state by changing the contents of the softmmu tlb, as well as changing the contents of memory (!) via PTE access/dirty bit updates. A more complete description of "a variety of ... errors", and the conditions under which they are produced, would be appreciated. r~