Nicholas Piggin <npig...@gmail.com> writes: > powerpc ifetch endianness depends on MSR[LE] so it has to byteswap > after cpu_ldl_code(). This corrects DSISR bits in alignment > interrupts when running in little endian mode. > > Signed-off-by: Nicholas Piggin <npig...@gmail.com>
Reviewed-by: Fabiano Rosas <faro...@suse.de>
