All these generic CPUs are using the latest priv available, at this moment PRIV_VERSION_1_12_0:
- riscv_any_cpu_init() - rv32_base_cpu_init() - rv64_base_cpu_init() - rv128_base_cpu_init() Create a new PRIV_VERSION_LATEST enum and use it in those cases. I'll make it easier to update everything at once when a new priv version is available. Signed-off-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com> Reviewed-by: Richard Henderson <richard.hender...@linaro.org> Reviewed-by: LIU Zhiwei <zhiwei_...@linux.alibaba.com> --- target/riscv/cpu.c | 8 ++++---- target/riscv/cpu.h | 2 ++ 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 18032dfd4e..1ee322001b 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -338,7 +338,7 @@ static void riscv_any_cpu_init(Object *obj) VM_1_10_SV32 : VM_1_10_SV57); #endif - env->priv_ver = PRIV_VERSION_1_12_0; + env->priv_ver = PRIV_VERSION_LATEST; register_cpu_props(obj); } @@ -350,7 +350,7 @@ static void rv64_base_cpu_init(Object *obj) set_misa(env, MXL_RV64, 0); register_cpu_props(obj); /* Set latest version of privileged specification */ - env->priv_ver = PRIV_VERSION_1_12_0; + env->priv_ver = PRIV_VERSION_LATEST; #ifndef CONFIG_USER_ONLY set_satp_mode_max_supported(RISCV_CPU(obj), VM_1_10_SV57); #endif @@ -426,7 +426,7 @@ static void rv128_base_cpu_init(Object *obj) set_misa(env, MXL_RV128, 0); register_cpu_props(obj); /* Set latest version of privileged specification */ - env->priv_ver = PRIV_VERSION_1_12_0; + env->priv_ver = PRIV_VERSION_LATEST; #ifndef CONFIG_USER_ONLY set_satp_mode_max_supported(RISCV_CPU(obj), VM_1_10_SV57); #endif @@ -439,7 +439,7 @@ static void rv32_base_cpu_init(Object *obj) set_misa(env, MXL_RV32, 0); register_cpu_props(obj); /* Set latest version of privileged specification */ - env->priv_ver = PRIV_VERSION_1_12_0; + env->priv_ver = PRIV_VERSION_LATEST; #ifndef CONFIG_USER_ONLY set_satp_mode_max_supported(RISCV_CPU(obj), VM_1_10_SV32); #endif diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 638e47c75a..76f81c6b68 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -88,6 +88,8 @@ enum { PRIV_VERSION_1_10_0 = 0, PRIV_VERSION_1_11_0, PRIV_VERSION_1_12_0, + + PRIV_VERSION_LATEST = PRIV_VERSION_1_12_0, }; #define VEXT_VERSION_1_00_0 0x00010000 -- 2.39.2