On Tue, Mar 21, 2023 at 02:23:03PM +0100, Eric Auger wrote: > >>> s->idr[5] = FIELD_DP32(s->idr[5], IDR5, GRAN64K, 1); > >>> - s->idr[5] = FIELD_DP32(s->idr[5], IDR5, OAS, SMMU_IDR5_OAS); /* 44 > >>> bits */ > >>> + s->idr[5] = FIELD_DP32(s->idr[5], IDR5, OAS, oas); > >> I am not sure you can change that easily. In case of migration this is > >> going to change the behavior of the device, no? > > I see IDR registers are not migrated. I guess we can add them in a > > subsection and if they were not passed (old instances) we set OAS to > > 44. > > Maybe this should be another change outside of this series. > Indeed tehy are not migrated so it can lead to inconsistent behavior in > both source and dest. This deserves more analysis to me. In case you > would decide to migrate IDR regs this would need to be done in that > series I think. Migration must not be broken by this series
I agree, I meant to drop this patch from the series as it is not really related to stage-2, and we can have another patch for this + migration for IDR if needed after doing proper analysis. Thanks, Mostafa
