Richard Henderson <richard.hender...@linaro.org> writes:
> These bits may be used to describe the precise atomicity > requirements of the guest, which may then be used to > constrain the methods by which it may be emulated by the host. > > For instance, the AArch64 LDP (32-bit) instruction changes > semantics with ARMv8.4 LSE2, from > > MO_64 | MO_ATMAX_4 | MO_ATOM_IFALIGN > (64-bits, single-copy atomic only on 4 byte units, > nonatomic if not aligned by 4), > > to > > MO_64 | MO_ATMAX_SIZE | MO_ATOM_WITHIN16 > (64-bits, single-copy atomic within a 16 byte block) > > The former may be implemented with two 4 byte loads, or > a single 8 byte load if that happens to be efficient on > the host. The latter may not, and may also require a > helper when misaligned. > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> Reviewed-by: Alex Bennée <alex.ben...@linaro.org> -- Alex Bennée Virtualisation Tech Lead @ Linaro
