Based-on: 20230216025739.1211680-1-richard.hender...@linaro.org
("[PATCH v2 00/30] tcg: Improve atomicity support")This adds some plumbing to handle an ARM page table corner case. But first, we need to reorg the page table bits to make room, and in the process resolve a long-standing FIXME for AdvSIMD. r~ Richard Henderson (13): target/sparc: Use tlb_set_page_full accel/tcg: Retain prot flags from tlb_fill accel/tcg: Store some tlb flags in CPUTLBEntryFull accel/tcg: Honor TLB_DISCARD_WRITE in atomic_mmu_lookup softmmu/physmem: Check watchpoints for read+write at once accel/tcg: Trigger watchpoints from atomic_mmu_lookup accel/tcg: Move TLB_WATCHPOINT to TLB_SLOW_FLAGS_MASK target/arm: Support 32-byte alignment in pow2_align exec/memattrs: Remove target_tlb_bit* accel/tcg: Add tlb_fill_flags to CPUTLBEntryFull accel/tcg: Add TLB_CHECK_ALIGNED target/arm: Do memory type alignment check when translation disabled target/arm: Do memory type alignment check when translation enabled include/exec/cpu-all.h | 29 +++++-- include/exec/cpu-defs.h | 9 ++ include/exec/memattrs.h | 12 --- include/hw/core/cpu.h | 7 +- accel/tcg/cputlb.c | 171 ++++++++++++++++++++++++++------------ softmmu/physmem.c | 19 +++-- target/arm/helper.c | 36 +++++++- target/arm/ptw.c | 28 +++++++ target/arm/translate.c | 8 +- target/sparc/mmu_helper.c | 121 ++++++++++++--------------- 10 files changed, 278 insertions(+), 162 deletions(-) -- 2.34.1
