Philippe Mathieu-Daudé <phi...@linaro.org> writes:
> On 22/2/23 12:01, Alex Bennée wrote: >> This is a mandatory feature for Armv8.1 architectures but we don't >> state the feature clearly in our emulation list. > > Split in 2 patches? Its all pretty much a NOP aside from the comments. I split the isar code just to check my working. > > Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org> > >> While checking verify >> our cortex-a76 model matches up with the current TRM by breaking out >> the long form isar into a more modern readable FIELD_DP code. >> >> Signed-off-by: Alex Bennée <alex.ben...@linaro.org> >> --- >> docs/system/arm/emulation.rst | 1 + >> target/arm/cpu64.c | 29 ++++++++++++++++++++++++++--- >> target/arm/cpu_tcg.c | 2 +- >> 3 files changed, 28 insertions(+), 4 deletions(-) -- Alex Bennée Virtualisation Tech Lead @ Linaro
