Re: [Patch 04/14] target/riscv: Add cfg properties for Zv* extension

[Daniel Henrique Barboza]

On 2/14/23 05:38, Weiwei Li wrote:

Add properties for Zve64d,Zvfh,Zvfhmin extension

"for Zve64d,Zvfh,Zvfhmin extensions."

Signed-off-by: Weiwei Li <liwei...@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqi...@iscas.ac.cn>
---

Reviewed-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com>

  target/riscv/cpu.h | 3 +++
  1 file changed, 3 insertions(+)

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 7128438d8e..54c6875617 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -462,7 +462,10 @@ struct RISCVCPUConfig {
      bool ext_zhinxmin;
      bool ext_zve32f;
      bool ext_zve64f;
+    bool ext_zve64d;
      bool ext_zmmul;
+    bool ext_zvfh;
+    bool ext_zvfhmin;
      bool ext_smaia;
      bool ext_ssaia;
      bool ext_sscofpmf;