Add Multiple APIC Description Table (MADT) with the INTC structure for each cpu.
Signed-off-by: Sunil V L <suni...@ventanamicro.com> --- hw/riscv/virt-acpi-build.c | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c index 0410b955bd..2f65f1e2e5 100644 --- a/hw/riscv/virt-acpi-build.c +++ b/hw/riscv/virt-acpi-build.c @@ -137,6 +137,43 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, RISCVVirtState *vms) free_aml_allocator(); } +/* MADT */ +static void +build_madt(GArray *table_data, BIOSLinker *linker, RISCVVirtState *vms) +{ + MachineState *mc = MACHINE(vms); + int socket; + uint16_t base_hartid = 0; + uint32_t cpu_id = 0; + + AcpiTable table = { .sig = "APIC", .rev = 6, .oem_id = vms->oem_id, + .oem_table_id = vms->oem_table_id }; + + acpi_table_begin(&table, table_data); + /* Local Interrupt Controller Address */ + build_append_int_noprefix(table_data, 0, 4); + build_append_int_noprefix(table_data, 0, 4); /* MADT Flags */ + + /* RISC-V Local INTC structures per HART */ + for (socket = 0; socket < riscv_socket_count(mc); socket++) { + base_hartid = riscv_socket_first_hartid(mc, socket); + + for (int i = 0; i < vms->soc[socket].num_harts; i++) { + build_append_int_noprefix(table_data, 0x18, 1); /* Type */ + build_append_int_noprefix(table_data, 20, 1); /* Length */ + build_append_int_noprefix(table_data, 1, 1); /* Version */ + build_append_int_noprefix(table_data, 0, 1); /* Reserved */ + build_append_int_noprefix(table_data, 1, 4); /* Flags */ + build_append_int_noprefix(table_data, + (base_hartid + i), 8); /* hartid */ + build_append_int_noprefix(table_data, cpu_id, 4); /* ACPI ID */ + cpu_id++; + } + } + + acpi_table_end(linker, &table); +} + static void virt_acpi_build(RISCVVirtState *vms, AcpiBuildTables *tables) { -- 2.38.0