On Tue, Jan 31, 2023 at 11:13 PM Alexandre Ghiti <alexgh...@rivosinc.com> wrote: > > RISC-V specifies multiple sizes for addressable memory and Linux probes for > the machine's support at startup via the satp CSR register (done in > csr.c:validate_vm). > > As per the specification, sv64 must support sv57, which in turn must > support sv48...etc. So we can restrict machine support by simply setting the > "highest" supported mode and the bare mode is always supported. > > You can set the satp mode using the new properties "sv32", "sv39", "sv48", > "sv57" and "sv64" as follows: > -cpu rv64,sv57=on # Linux will boot using sv57 scheme > -cpu rv64,sv39=on # Linux will boot using sv39 scheme > -cpu rv64,sv57=off # Linux will boot using sv48 scheme > -cpu rv64 # Linux will boot using sv57 scheme by default > > We take the highest level set by the user: > -cpu rv64,sv48=on,sv57=on # Linux will boot using sv57 scheme > > We make sure that invalid configurations are rejected: > -cpu rv64,sv39=off,sv48=on # sv39 must be supported if higher modes are > # enabled > > We accept "redundant" configurations: > -cpu rv64,sv48=on,sv57=off # Linux will boot using sv48 scheme > > And contradictory configurations: > -cpu rv64,sv48=on,sv48=off # Linux will boot using sv39 scheme > > Co-Developed-by: Ludovic Henry <ludo...@rivosinc.com> > Signed-off-by: Ludovic Henry <ludo...@rivosinc.com> > Signed-off-by: Alexandre Ghiti <alexgh...@rivosinc.com> > Reviewed-by: Andrew Jones <ajo...@ventanamicro.com> > --- > target/riscv/cpu.c | 207 +++++++++++++++++++++++++++++++++++++++++++++ > target/riscv/cpu.h | 19 +++++ > target/riscv/csr.c | 12 ++- > 3 files changed, 231 insertions(+), 7 deletions(-) >
Reviewed-by: Bin Meng <bm...@tinylab.org>
