On 1/18/23 09:11, Richard Henderson wrote:
The old implementation replaces two insns, swapping betweenb <dest> nop and pcaddu18i tmp, <dest> jirl zero, tmp, <dest> & 0xffff There is a race condition in which a thread could be stopped at the jirl, i.e. with the top of the address loaded, and when restarted we have re-linked to a different TB, so that the top half no longer matches the bottom half. Note that while we never directly re-link to a different TB, we can link, unlink, and link again all while the stopped thread remains stopped. The new implementation replaces only one insn, swapping between b <dest> and pcadd tmp, <jmp_addr> falling through to load the address from tmp, and branch. Signed-off-by: Richard Henderson <richard.hender...@linaro.org> --- tcg/loongarch64/tcg-target.h | 7 +--- tcg/loongarch64/tcg-target.c.inc | 72 ++++++++++++++------------------ 2 files changed, 33 insertions(+), 46 deletions(-)
I've tested this on my 3A5000 box and things seem to work, thanks. Reviewed-by: WANG Xuerui <g...@xen0n.name>
