On 13.01.2012, at 21:52, Peter Maydell wrote: > From: Evgeny Voevodin <e.voevo...@samsung.com> > > The secondary CPU bootloader in arm_boot.c holds secondary CPUs in a > pen until the primary CPU releases them. Make boards specify the > address to be polled to determine whether to leave the pen (it was > previously hardcoded to 0x10000030, which is a Versatile Express/ > Realview specific system register address).
Is smp_boot implementing the same logic as hw/ppce500_spin.c? It looks like the normal u-boot way of waiting for a magic address to be written with boot info. What I don't understand is the WFI. How can you wait for an interrupt if the trigger is a memory write? Or are you actually getting IPIs? Alex
