Nada Lachtar <nlach...@umich.edu> writes:
> [[S/MIME Signed Part:Undecided]] > Hello, > > Does Qemu maintain two TLB for the x86_64 system (i.e iTLB and dTLB)? > If yes, can you please point me to how to access the dTLB and what > data structure maintains this information! Qemu's internal softmmu TLB is unified and holds information for code loads, memory accesses and re-directions for io access. See CPUTLBEntry and CPUTLBEntryFull. They do not directly map onto any target specific structures (although targets can use TARGET_PAGE_ENTRY_EXTRA to store extra information in the table). These entries are filled by target specific code via cpu->cc->tcg_ops->tlb_fill() which in the x86 case takes you to x86_cpu_tlb_fill(). This is the code responsible to walking the target page tables and filling in the details of the mappings. > > I would appreciate any help, > > > Thanks, > > > > > [[End of S/MIME Signed Part]] -- Alex Bennée Virtualisation Tech Lead @ Linaro
