This allows us to update gbea before other updates to psw_addr, which will be important for TARGET_TB_PCREL.
Reviewed-by: Ilya Leoshkevich <i...@linux.ibm.com> Signed-off-by: Richard Henderson <richard.hender...@linaro.org> --- target/s390x/tcg/translate.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index b7c0d24d75..6006db3db2 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -353,7 +353,6 @@ static inline bool per_enabled(DisasContext *s) static void per_branch_dest(DisasContext *s, TCGv_i64 dest) { #ifndef CONFIG_USER_ONLY - gen_psw_addr_disp(s, gbea, 0); if (per_enabled(s)) { gen_helper_per_branch(cpu_env, gbea, dest); } @@ -363,7 +362,6 @@ static void per_branch_dest(DisasContext *s, TCGv_i64 dest) static void per_branch_disp(DisasContext *s, int64_t disp) { #ifndef CONFIG_USER_ONLY - gen_psw_addr_disp(s, gbea, 0); if (per_enabled(s)) { TCGv_i64 dest = tcg_temp_new_i64(); gen_psw_addr_disp(s, dest, disp); @@ -1153,13 +1151,14 @@ struct DisasInsn { static DisasJumpType help_goto_direct(DisasContext *s, int64_t disp) { + per_breaking_event(s); + if (disp == s->ilen) { per_branch_disp(s, disp); return DISAS_NEXT; } if (use_goto_tb(s, s->base.pc_next + disp)) { update_cc_op(s); - per_breaking_event(s); tcg_gen_goto_tb(0); update_psw_addr_disp(s, disp); tcg_gen_exit_tb(s->base.tb, 0); @@ -1173,6 +1172,7 @@ static DisasJumpType help_goto_direct(DisasContext *s, int64_t disp) static DisasJumpType help_goto_indirect(DisasContext *s, TCGv_i64 dest) { + per_breaking_event(s); tcg_gen_mov_i64(psw_addr, dest); per_branch_dest(s, psw_addr); return DISAS_PC_UPDATED; @@ -1233,6 +1233,7 @@ static DisasJumpType help_branch(DisasContext *s, DisasCompare *c, } /* Branch taken. */ + per_breaking_event(s); if (is_imm) { gen_psw_addr_disp(s, psw_addr, disp); } -- 2.34.1