On 21/11/22 16:34, Bernhard Beschow wrote:
Am 27. Oktober 2022 20:47:19 UTC schrieb "Philippe Mathieu-Daudé"
<phi...@linaro.org>:
Linux kernel expects the northbridge & southbridge chipsets
configured by the BIOS firmware. We emulate that by writing
a tiny bootloader code in write_bootloader().
Upon introduction in commit 5c2b87e34d ("PIIX4 support"),
the PIIX4 configuration space included values specific to
the Malta board.
Set the Malta-specific IRQ routing values in the embedded
bootloader, so the next commit can remove the Malta specific
bits from the PIIX4 PCI-ISA bridge and make it generic
(matching the real hardware).
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
---
FIXME: Missing the nanoMIPS counter-part!
Who will be taking care of this? I have absolutely no clue how the
write_bootloader functions work, so I don't see how to fix it.
Oh actually I wrote that and tested it but context switched and forgot
about it... I'll look back when I get some time, probably around the
release.
Couldn't we just do it like in pegasos2_init() where the registers are
initialized by QEMU directly if there is no bootloader binary configured? I
could do that.
I rather mimic bootloaders... maybe a matter of taste?
Regards,
Phil.