Re: [PATCH v2] hw/arm/aspeed: increase Bletchley memory size

[Cédric Le Goater]

On 10/7/22 13:05, Patrick Williams wrote:

For the PVT-class hardware we have increased the memory size of
this device to 2 GiB.  Adjust the device model accordingly.

Signed-off-by: Patrick Williams <patr...@stwcx.xyz>

Reviewed-by: Cédric Le Goater <c...@kaod.org>

Thanks,

C.

---
  hw/arm/aspeed.c | 9 ++++++++-
  1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 7d2162c6ed..f8bc6d4a14 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -1330,6 +1330,13 @@ static void aspeed_machine_fuji_class_init(ObjectClass 
*oc, void *data)
          aspeed_soc_num_cpus(amc->soc_name);
  };

+/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */

+#if HOST_LONG_BITS == 32
+#define BLETCHLEY_BMC_RAM_SIZE (1 * GiB)
+#else
+#define BLETCHLEY_BMC_RAM_SIZE (2 * GiB)
+#endif
+
  static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data)
  {
      MachineClass *mc = MACHINE_CLASS(oc);
@@ -1344,7 +1351,7 @@ static void 
aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data)
      amc->num_cs    = 2;
      amc->macs_mask = ASPEED_MAC2_ON;
      amc->i2c_init  = bletchley_bmc_i2c_init;
-    mc->default_ram_size = 512 * MiB;
+    mc->default_ram_size = BLETCHLEY_BMC_RAM_SIZE;
      mc->default_cpus = mc->min_cpus = mc->max_cpus =
          aspeed_soc_num_cpus(amc->soc_name);
  }