Add a latching switch device connect between g220a BMC machind(soc
gpio) as host-power.
The latching switch device default state is off and trigger edge is
falling edge.
Tested:
In qemu, use g220a image
~# ipmitool power status
Chassis Power is off
~# ipmitool power on
Chassis Power Control: Up/On
~# ipmitool power status
Chassis Power is on
~# ipmitool power off
Chassis Power Control: Down/Off
~# ipmitool power status
Chassis Power is off
Signed-off-by: Jian Zhang <zhangjian.3...@bytedance.com>
---
hw/arm/Kconfig | 1 +
hw/arm/aspeed.c | 20 ++++++++++++++++++++
2 files changed, 21 insertions(+)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 15fa79afd3..f2455db5a0 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -457,6 +457,7 @@ config ASPEED_SOC
select LED
select PMBUS
select MAX31785
+ select LATCHING_SWITCH
config MPS2
bool
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index bc3ecdb619..070de3aeff 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -27,6 +27,7 @@
#include "qemu/units.h"
#include "hw/qdev-clock.h"
#include "sysemu/sysemu.h"
+#include "hw/misc/latching_switch.h"
static struct arm_boot_info aspeed_board_binfo = {
.board_id = -1, /* device-tree-only board */
@@ -666,6 +667,25 @@ static void g220a_bmc_i2c_init(AspeedMachineState *bmc)
};
smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x57,
eeprom_buf);
+
+ /* Add a host-power device */
+ LatchingSwitchState *power =
+ latching_switch_create_simple(OBJECT(bmc),
+ false, TRIGGER_EDGE_FALLING);
+
+ /*
+ * connect the input to soc(out, power button)
+ * the power button in g220a is 215
+ */
+ qdev_connect_gpio_out(DEVICE(&bmc->soc.gpio), 215,
+ qdev_get_gpio_in(DEVICE(power), 0));
+
+ /*
+ * connect the output to soc(in, power good signal)
+ * the power good in g220a is 209
+ */
+ qdev_connect_gpio_out(DEVICE(power), 0,
+ qdev_get_gpio_in(DEVICE(&bmc->soc.gpio), 209));
}
static void aspeed_eeprom_init(I2CBus *bus, uint8_t addr, uint32_t rsize)
--
2.25.1
