On 7/4/22 20:24, Peter Maydell wrote:
Previously, we had A-profile allocate separate mmu_idx for secure
vs non-secure. I've done away with that. Now, I flush all mmu_idx
when SCR_EL3.NS is changed. I did not see how we could reasonably
add 8 more mmu_idx for Realm. Moreover, I had a look through ARM
Trusted Firmware, at the code paths used to change between Secure
and Nonsecure. We wind up flushing all of these mmu_idx anyway while
swapping the EL1+EL2 cpregs, so there is no gain at all in attempting
to keep them live at the same time within qemu.
Is there no SMC/interrupt/etc at all which is handled as a "just do the
thing at EL3" without dropping down to secure EL2/EL1 ?
I'm sure there is, but it's only swapping between S EL[012] and NS EL[012] that concerned
me. Is there something that I'm missing?
r~
