Signed-off-by: Lucas Coutinho <lucas.couti...@eldorado.org.br>
---
target/ppc/helper.h | 2 +-
target/ppc/insn32.decode | 2 ++
target/ppc/mmu-hash64.c | 2 +-
target/ppc/translate.c | 14 --------------
target/ppc/translate/storage-ctrl-impl.c.inc | 14 ++++++++++++++
5 files changed, 18 insertions(+), 16 deletions(-)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index c2440a8854..ad88073ae0 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -690,7 +690,7 @@ DEF_HELPER_FLAGS_2(tlbiva, TCG_CALL_NO_RWG, void, env, tl)
DEF_HELPER_FLAGS_4(tlbie_isa300, TCG_CALL_NO_WG, void, \
env, tl, tl, i32)
-DEF_HELPER_FLAGS_3(store_slb, TCG_CALL_NO_RWG, void, env, tl, tl)
+DEF_HELPER_FLAGS_3(SLBMTE, TCG_CALL_NO_RWG, void, env, tl, tl)
DEF_HELPER_2(load_slb_esid, tl, env, tl)
DEF_HELPER_2(load_slb_vsid, tl, env, tl)
DEF_HELPER_2(find_slb_vsid, tl, env, tl)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index 1349c5e8a7..e255f9241b 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -823,6 +823,8 @@ SLBIEG 011111 ..... ----- ..... 0111010010 -
@X_tb
SLBIA 011111 --... ----- ----- 0111110010 - @X_ih
+SLBMTE 011111 ..... ----- ..... 0110010010 - @X_tb
+
## TLB Management Instructions
&X_tlbie rb rs ric prs:bool r:bool
diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c
index dd2c7e588f..1922960608 100644
--- a/target/ppc/mmu-hash64.c
+++ b/target/ppc/mmu-hash64.c
@@ -309,7 +309,7 @@ static int ppc_find_slb_vsid(PowerPCCPU *cpu, target_ulong
rb,
return 0;
}
-void helper_store_slb(CPUPPCState *env, target_ulong rb, target_ulong rs)
+void helper_SLBMTE(CPUPPCState *env, target_ulong rb, target_ulong rs)
{
PowerPCCPU *cpu = env_archcpu(env);
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 5d2416143f..d421fe267c 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -5351,19 +5351,6 @@ static void gen_mtsrin_64b(DisasContext *ctx)
#endif /* defined(CONFIG_USER_ONLY) */
}
-/* slbmte */
-static void gen_slbmte(DisasContext *ctx)
-{
-#if defined(CONFIG_USER_ONLY)
- GEN_PRIV(ctx);
-#else
- CHK_SV(ctx);
-
- gen_helper_store_slb(cpu_env, cpu_gpr[rB(ctx->opcode)],
- cpu_gpr[rS(ctx->opcode)]);
-#endif /* defined(CONFIG_USER_ONLY) */
-}
-
static void gen_slbmfee(DisasContext *ctx)
{
#if defined(CONFIG_USER_ONLY)
@@ -6857,7 +6844,6 @@ GEN_HANDLER2(mfsrin_64b, "mfsrin", 0x1F, 0x13, 0x14,
0x001F0001,
GEN_HANDLER2(mtsr_64b, "mtsr", 0x1F, 0x12, 0x06, 0x0010F801, PPC_SEGMENT_64B),
GEN_HANDLER2(mtsrin_64b, "mtsrin", 0x1F, 0x12, 0x07, 0x001F0001,
PPC_SEGMENT_64B),
-GEN_HANDLER2(slbmte, "slbmte", 0x1F, 0x12, 0x0C, 0x001F0001, PPC_SEGMENT_64B),
GEN_HANDLER2(slbmfee, "slbmfee", 0x1F, 0x13, 0x1C, 0x001F0001,
PPC_SEGMENT_64B),
GEN_HANDLER2(slbmfev, "slbmfev", 0x1F, 0x13, 0x1A, 0x001F0001,
PPC_SEGMENT_64B),
GEN_HANDLER2(slbfee_, "slbfee.", 0x1F, 0x13, 0x1E, 0x001F0000,
PPC_SEGMENT_64B),
diff --git a/target/ppc/translate/storage-ctrl-impl.c.inc
b/target/ppc/translate/storage-ctrl-impl.c.inc
index cbb8b81f13..4c2dd758b5 100644
--- a/target/ppc/translate/storage-ctrl-impl.c.inc
+++ b/target/ppc/translate/storage-ctrl-impl.c.inc
@@ -63,6 +63,20 @@ static bool trans_SLBIA(DisasContext *ctx, arg_SLBIA *a)
return true;
}
+static bool trans_SLBMTE(DisasContext *ctx, arg_SLBMTE *a)
+{
+ REQUIRE_64BIT(ctx);
+ REQUIRE_INSNS_FLAGS(ctx, SEGMENT_64B);
+ REQUIRE_SV(ctx);
+
+#if !defined(CONFIG_USER_ONLY) && defined(TARGET_PPC64)
+ gen_helper_SLBMTE(cpu_env, cpu_gpr[a->rb], cpu_gpr[a->rt]);
+#else
+ qemu_build_not_reached();
+#endif
+ return true;
+}
+
static bool do_tlbie(DisasContext *ctx, arg_X_tlbie *a, bool local)
{
#if defined(CONFIG_USER_ONLY)
--
2.25.1
