Changes for v3:
* Rebase on mainline (20 patches upstreamed; new conflicts resolved).
* Test bit 31 before disas_sme.
The first 21 patches, excepting 17, have been reviewed.
r~
Richard Henderson (51):
target/arm: Implement TPIDR2_EL0
target/arm: Add SMEEXC_EL to TB flags
target/arm: Add syn_smetrap
target/arm: Add ARM_CP_SME
target/arm: Add SVCR
target/arm: Add SMCR_ELx
target/arm: Add SMIDR_EL1, SMPRI_EL1, SMPRIMAP_EL2
target/arm: Add PSTATE.{SM,ZA} to TB flags
target/arm: Add the SME ZA storage to CPUARMState
target/arm: Implement SMSTART, SMSTOP
target/arm: Move error for sve%d property to arm_cpu_sve_finalize
target/arm: Create ARMVQMap
target/arm: Generalize cpu_arm_{get,set}_vq
target/arm: Generalize cpu_arm_{get,set}_default_vec_len
target/arm: Move arm_cpu_*_finalize to internals.h
target/arm: Unexport aarch64_add_*_properties
target/arm: Add cpu properties for SME
target/arm: Introduce sve_vqm1_for_el_sm
target/arm: Add SVL to TB flags
target/arm: Move pred_{full,gvec}_reg_{offset,size} to translate-a64.h
target/arm: Add infrastructure for disas_sme
target/arm: Trap AdvSIMD usage when Streaming SVE is active
target/arm: Implement SME RDSVL, ADDSVL, ADDSPL
target/arm: Implement SME ZERO
target/arm: Implement SME MOVA
target/arm: Implement SME LD1, ST1
target/arm: Export unpredicated ld/st from translate-sve.c
target/arm: Implement SME LDR, STR
target/arm: Implement SME ADDHA, ADDVA
target/arm: Implement FMOPA, FMOPS (non-widening)
target/arm: Implement BFMOPA, BFMOPS
target/arm: Implement FMOPA, FMOPS (widening)
target/arm: Implement SME integer outer product
target/arm: Implement PSEL
target/arm: Implement REVD
target/arm: Implement SCLAMP, UCLAMP
target/arm: Reset streaming sve state on exception boundaries
target/arm: Enable SME for -cpu max
linux-user/aarch64: Clear tpidr2_el0 if CLONE_SETTLS
linux-user/aarch64: Reset PSTATE.SM on syscalls
linux-user/aarch64: Add SM bit to SVE signal context
linux-user/aarch64: Tidy target_restore_sigframe error return
linux-user/aarch64: Do not allow duplicate or short sve records
linux-user/aarch64: Verify extra record lock succeeded
linux-user/aarch64: Move sve record checks into restore
linux-user/aarch64: Implement SME signal handling
linux-user: Rename sve prctls
linux-user/aarch64: Implement PR_SME_GET_VL, PR_SME_SET_VL
target/arm: Only set ZEN in reset if SVE present
target/arm: Enable SME for user-only
linux-user/aarch64: Add SME related hwcap entries
docs/system/arm/cpu-features.rst | 56 ++
docs/system/arm/emulation.rst | 4 +
linux-user/aarch64/target_cpu.h | 5 +-
linux-user/aarch64/target_prctl.h | 56 +-
target/arm/cpregs.h | 5 +
target/arm/cpu.h | 95 ++-
target/arm/helper-sme.h | 146 ++++
target/arm/helper-sve.h | 4 +
target/arm/helper.h | 19 +
target/arm/internals.h | 4 +
target/arm/syndrome.h | 14 +
target/arm/translate-a64.h | 53 ++
target/arm/translate.h | 14 +
target/arm/sme-fa64.decode | 89 +++
target/arm/sme.decode | 88 +++
target/arm/sve.decode | 31 +-
linux-user/aarch64/cpu_loop.c | 9 +
linux-user/aarch64/signal.c | 242 +++++-
linux-user/elfload.c | 20 +
linux-user/syscall.c | 28 +-
target/arm/cpu.c | 34 +-
target/arm/cpu64.c | 216 ++++--
target/arm/helper.c | 276 ++++++-
target/arm/kvm64.c | 2 +-
target/arm/machine.c | 34 +
target/arm/sme_helper.c | 1174 +++++++++++++++++++++++++++++
target/arm/sve_helper.c | 28 +
target/arm/translate-a64.c | 141 +++-
target/arm/translate-sme.c | 353 +++++++++
target/arm/translate-sve.c | 283 +++++--
target/arm/translate-vfp.c | 12 +
target/arm/translate.c | 1 +
target/arm/vec_helper.c | 24 +
target/arm/meson.build | 4 +
34 files changed, 3367 insertions(+), 197 deletions(-)
create mode 100644 target/arm/helper-sme.h
create mode 100644 target/arm/sme-fa64.decode
create mode 100644 target/arm/sme.decode
create mode 100644 target/arm/sme_helper.c
create mode 100644 target/arm/translate-sme.c
--
2.34.1
