With SME, the vector length does not only come from ZCR_ELx.
Comment that this is either the SVE VL, or the Streaming SVE VL.
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
target/arm/cpu.h | 3 ++-
target/arm/helper.c | 2 +-
target/arm/translate-a64.c | 2 +-
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 5bc6382fce..69e71fdcec 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3117,7 +3117,8 @@ FIELD(TBFLAG_M32, MVE_NO_PRED, 5, 1) /* Not
cached. */
*/
FIELD(TBFLAG_A64, TBII, 0, 2)
FIELD(TBFLAG_A64, SVEEXC_EL, 2, 2)
-FIELD(TBFLAG_A64, ZCR_LEN, 4, 4)
+/* The current vector length, either SVE VL or Streaming SVE VL. */
+FIELD(TBFLAG_A64, SVE_LEN, 4, 4)
FIELD(TBFLAG_A64, PAUTH_ACTIVE, 8, 1)
FIELD(TBFLAG_A64, BT, 9, 1)
FIELD(TBFLAG_A64, BTYPE, 10, 2) /* Not cached. */
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 5c875927cf..2a0399100e 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -13683,7 +13683,7 @@ static CPUARMTBFlags rebuild_hflags_a64(CPUARMState
*env, int el, int fp_el,
zcr_len = sve_zcr_len_for_el(env, el);
}
DP_TBFLAG_A64(flags, SVEEXC_EL, sve_el);
- DP_TBFLAG_A64(flags, ZCR_LEN, zcr_len);
+ DP_TBFLAG_A64(flags, SVE_LEN, zcr_len);
}
sctlr = regime_sctlr(env, stage1);
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index cc9344b015..09ac344d35 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -14608,7 +14608,7 @@ static void
aarch64_tr_init_disas_context(DisasContextBase *dcbase,
dc->align_mem = EX_TBFLAG_ANY(tb_flags, ALIGN_MEM);
dc->pstate_il = EX_TBFLAG_ANY(tb_flags, PSTATE__IL);
dc->sve_excp_el = EX_TBFLAG_A64(tb_flags, SVEEXC_EL);
- dc->sve_len = (EX_TBFLAG_A64(tb_flags, ZCR_LEN) + 1) * 16;
+ dc->sve_len = (EX_TBFLAG_A64(tb_flags, SVE_LEN) + 1) * 16;
dc->pauth_active = EX_TBFLAG_A64(tb_flags, PAUTH_ACTIVE);
dc->bt = EX_TBFLAG_A64(tb_flags, BT);
dc->btype = EX_TBFLAG_A64(tb_flags, BTYPE);
--
2.34.1
