On Sun, May 15, 2022 at 12:56 PM Tsukasa OI
<research_tra...@irq.a4lg.com> wrote:
>
> QEMU allowed inconsistent configurations that made floating point
> arithmetic effectively unusable.
>
> This commit adds certain checks for consistent FP arithmetic:
>
> - F requires Zicsr
> - Zfinx requires Zicsr
> - Zfh/Zfhmin require F
> - D requires F
> - V requires D
>
> Because F/D/Zicsr are enabled by default (and an error will not occur unless
> we manually disable one or more of prerequisites), this commit just enforces
> the user to give consistent combinations.
>
> Signed-off-by: Tsukasa OI <research_tra...@irq.a4lg.com>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> target/riscv/cpu.c | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 0854ca9103..f910a41407 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -610,11 +610,36 @@ static void riscv_cpu_realize(DeviceState *dev, Error
> **errp)
> cpu->cfg.ext_ifencei = true;
> }
>
> + if (cpu->cfg.ext_f && !cpu->cfg.ext_icsr) {
> + error_setg(errp, "F extension requires Zicsr");
> + return;
> + }
> +
> + if ((cpu->cfg.ext_zfh || cpu->cfg.ext_zfhmin) && !cpu->cfg.ext_f) {
> + error_setg(errp, "Zfh/Zfhmin extensions require F extension");
> + return;
> + }
> +
> + if (cpu->cfg.ext_d && !cpu->cfg.ext_f) {
> + error_setg(errp, "D extension requires F extension");
> + return;
> + }
> +
> + if (cpu->cfg.ext_v && !cpu->cfg.ext_d) {
> + error_setg(errp, "V extension requires D extension");
> + return;
> + }
> +
> if (cpu->cfg.ext_zdinx || cpu->cfg.ext_zhinx ||
> cpu->cfg.ext_zhinxmin) {
> cpu->cfg.ext_zfinx = true;
> }
>
> + if (cpu->cfg.ext_zfinx && !cpu->cfg.ext_icsr) {
> + error_setg(errp, "Zfinx extension requires Zicsr");
> + return;
> + }
> +
> if (cpu->cfg.ext_zk) {
> cpu->cfg.ext_zkn = true;
> cpu->cfg.ext_zkr = true;
> --
> 2.34.1
>
