This patch reintroduces the powernv8 bits of the code what was removed
in commit 9c10d86fee "ppc/pnv: Remove user-created PHB{3,4,5} devices",
using the pnv-phb device instead of the now late pnv-phb4 device,
allowing us to enable user creatable pnv-phb devices for the powernv9
machine.
Signed-off-by: Daniel Henrique Barboza <danielhb...@gmail.com>
---
hw/pci-host/pnv_phb4.c | 58 +++++++++++++++++++++++++++++++++++++-
hw/pci-host/pnv_phb4_pec.c | 6 ++--
hw/ppc/pnv.c | 2 ++
3 files changed, 63 insertions(+), 3 deletions(-)
diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
index becfd366f1..262251ebcf 100644
--- a/hw/pci-host/pnv_phb4.c
+++ b/hw/pci-host/pnv_phb4.c
@@ -1544,14 +1544,70 @@ void pnv_phb4_instance_init(Object *obj)
object_initialize_child(obj, "source", &phb->xsrc, TYPE_XIVE_SOURCE);
}
+static PnvPhb4PecState *pnv_phb4_get_pec(PnvChip *chip, PnvPHB *phb,
+ Error **errp)
+{
+ Pnv9Chip *chip9 = PNV9_CHIP(chip);
+ int chip_id = phb->chip_id;
+ int index = phb->phb_id;
+ int i, j;
+
+ for (i = 0; i < chip->num_pecs; i++) {
+ /*
+ * For each PEC, check the amount of phbs it supports
+ * and see if the given phb4 index matches an index.
+ */
+ PnvPhb4PecState *pec = &chip9->pecs[i];
+
+ for (j = 0; j < pec->num_phbs; j++) {
+ if (index == pnv_phb4_pec_get_phb_id(pec, j)) {
+ return pec;
+ }
+ }
+ }
+
+ error_setg(errp,
+ "pnv-phb chip-id %d index %d didn't match any existing PEC",
+ chip_id, index);
+
+ return NULL;
+}
+
void pnv_phb4_realize(DeviceState *dev, Error **errp)
{
PnvPHB *phb = PNV_PHB(dev);
+ PnvMachineState *pnv = PNV_MACHINE(qdev_get_machine());
+ PnvChip *chip = pnv_get_chip(pnv, phb->chip_id);
PCIHostState *pci = PCI_HOST_BRIDGE(dev);
XiveSource *xsrc = &phb->xsrc;
+ BusState *s;
+ Error *local_err = NULL;
int nr_irqs;
char name[32];
+ if (!chip) {
+ error_setg(errp, "invalid chip id: %d", phb->chip_id);
+ return;
+ }
+
+ /* User created PHBs need to be assigned to a PEC */
+ if (!phb->pec) {
+ phb->pec = pnv_phb4_get_pec(chip, phb, &local_err);
+ if (local_err) {
+ error_propagate(errp, local_err);
+ return;
+ }
+ }
+
+ /* Reparent the PHB to the chip to build the device tree */
+ pnv_chip_parent_fixup(chip, OBJECT(phb), phb->phb_id);
+
+ s = qdev_get_parent_bus(DEVICE(chip));
+ if (!qdev_set_parent_bus(DEVICE(phb), s, &local_err)) {
+ error_propagate(errp, local_err);
+ return;
+ }
+
/* Set the "big_phb" flag */
phb->big_phb = phb->phb_id == 0 || phb->phb_id == 3;
@@ -1763,7 +1819,7 @@ static void pnv_phb4_root_port_class_init(ObjectClass
*klass, void *data)
PCIERootPortClass *rpc = PCIE_ROOT_PORT_CLASS(klass);
dc->desc = "IBM PHB4 PCIE Root Port";
- dc->user_creatable = false;
+ dc->user_creatable = true;
device_class_set_parent_realize(dc, pnv_phb4_root_port_realize,
&rpc->parent_realize);
diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c
index 3eed560e44..243a079ea7 100644
--- a/hw/pci-host/pnv_phb4_pec.c
+++ b/hw/pci-host/pnv_phb4_pec.c
@@ -150,8 +150,10 @@ static void pnv_pec_realize(DeviceState *dev, Error **errp)
pec->num_phbs = pecc->num_phbs[pec->index];
/* Create PHBs if running with defaults */
- for (i = 0; i < pec->num_phbs; i++) {
- pnv_pec_default_phb_realize(pec, i, errp);
+ if (defaults_enabled()) {
+ for (i = 0; i < pec->num_phbs; i++) {
+ pnv_pec_default_phb_realize(pec, i, errp);
+ }
}
/* Initialize the XSCOM regions for the PEC registers */
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 34a200a29c..1a3cafcb7a 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -2155,6 +2155,8 @@ static void pnv_machine_power9_class_init(ObjectClass
*oc, void *data)
pmc->compat = compat;
pmc->compat_size = sizeof(compat);
pmc->dt_power_mgt = pnv_dt_power_mgt;
+
+ machine_class_allow_dynamic_sysbus_dev(mc, TYPE_PNV_PHB);
}
static void pnv_machine_power10_class_init(ObjectClass *oc, void *data)
--
2.32.0
