On Fri, Apr 22, 2022 at 8:48 AM Alistair Francis <alistai...@gmail.com> wrote:
> On Thu, Apr 21, 2022 at 12:17 PM Bin Meng <bmeng...@gmail.com> wrote: > > > > On Wed, Apr 20, 2022 at 5:57 PM <frank.ch...@sifive.com> wrote: > > > > > > From: Frank Chang <frank.ch...@sifive.com> > > > > > > Allow user to set core's marchid, mvendorid, mipid CSRs through > > > -cpu command line option. > > > > > > The default values of marchid and mipid are built with QEMU's version > > > numbers. > > > > > > Signed-off-by: Frank Chang <frank.ch...@sifive.com> > > > Reviewed-by: Jim Shu <jim....@sifive.com> > > > Reviewed-by: Alistair Francis <alistair.fran...@wdc.com> > > > --- > > > target/riscv/cpu.c | 9 +++++++++ > > > target/riscv/cpu.h | 4 ++++ > > > target/riscv/csr.c | 38 ++++++++++++++++++++++++++++++++++---- > > > 3 files changed, 47 insertions(+), 4 deletions(-) > > > > > > > Reviewed-by: Bin Meng <bmeng...@gmail.com> > > Do you mind rebasing this on > https://github.com/alistair23/qemu/tree/riscv-to-apply.next ? > Sure, will do. Regards, Frank Chang > > I have sent a PR and hopefully it should be merged into master soon > > Alistair > > > >
