On 4/21/22 05:07, Alexey Kardashevskiy wrote:
On 14/04/2022 22:41, Cédric Le Goater wrote:
After re-reading what I just wrote, I am leaning towards disabling use of
KVM_CAP_IRQFD_RESAMPLE as it seems last worked on POWER8 and never since :)
Did I miss something in the picture (hey Cedric)?
How about disabling it like this?
=====
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 5bfd4aa9e5aa..c999f7b1ab1b 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -732,7 +732,7 @@ static PCIINTxRoute spapr_route_intx_pin_to_irq(void
*opaque, int pin)
SpaprPhbState *sphb = SPAPR_PCI_HOST_BRIDGE(opaque);
PCIINTxRoute route;
- route.mode = PCI_INTX_ENABLED;
+ route.mode = PCI_INTX_DISABLED;
=====
I like it.
The only thing is that this resampling works on POWER8/XICS and
removing it there is not great. So far sPAPR PHB was unaware of
underlying interrupt controller, or was not it?
It is. The dynamic change of the underlying irqchip in QEMU and
in KVM required that for CAS. Of course, plenty is done in the
back of the devices when this happens, see spapr_irq.
There are some quirks related to LPM with VIO devices in Linux.
This is the only case I know about.
Thanks,
C.
